RFR: 8356159: RISC-V: Add Zabha [v11]

[Feilong Jiang]

On Fri, 30 May 2025 09:22:37 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> Hi, please consider.
>> 
>> This adds the byte and halfword atomic memory operations (Zabha) - https://github.com/riscv/riscv-zabha.
>> All amo-instructions, except load-reserve and store-conditional, can also be performed on natural aligned half-words and bytes. (i.e. the extension do not add lr.h/b or sc.h/b) This includes amocas if zacas extension is present.
>> 
>> The majority of this patch is to support amocas.h/b. We are now starting to really feel the pain of all these extensions, as CAS:ing 16/8-bits can now be done in three different ways:
>> - lr.w/sc.w 'narrow' CAS (no extension)
>> - amocas.w 'narrow' CAS (Zacas)
>> - amocas.h/b (Zacas + Zabha)
>> 
>> There is no hwprobe support yet.
>> 
>> Ran t1-3 with Zacas+Zabha and t1 without Zabha in qemu.
>> 
>> Thanks, Robbin
>
> Robbin Ehn has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains 20 additional commits since the last revision:
> 
>  - Set ins cost to 2xVOLA for cmpxchg
>  - Merge branch 'master' into 8356159
>  - Merge branch 'master' into 8356159
>  - ins cost fixes, print fixes
>  - Merge branch 'master' into 8356159
>  - Reg limits fixed
>  - Merge branch 'master' into 8356159
>  - Fixed reg selection
>  - More indention
>  - Indention
>  - ... and 10 more: https://git.openjdk.org/jdk/compare/f7e126de...b496c299

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4151:

> 4149:       zext(prev, prev, 32);
> 4150:       break;
> 4151:     case int16:

The call site of `atomic_cas` is only guaranteed by `UseZacas`. Do we need extra checking for `UseZabha` if the operand size is `int16` or `int8`?

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PR Review Comment: https://git.openjdk.org/jdk/pull/25252#discussion_r2123175989