RFR: 8358032: Use crypto pmull for CRC32/CRC32C intrinsics on Ampere CPU [v2]

[Liming Liu]

On Wed, 4 Jun 2025 08:47:13 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 4355:
>> 
>>> 4353:     add(buf, buf, 32);
>>> 4354:     crc32x(crc, crc, tmp2);
>>> 4355:     subs(len, len, 32);
>> 
>> What is the point of these changes?
>
> To be more precise: converting these adjustments to post-increment operations isn't obviously an improvement on AArch64 generally. How does it help?

According to perf, post-increment ops help to reduce the access to TLB on Ampere1 in this case.

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PR Review Comment: https://git.openjdk.org/jdk/pull/25609#discussion_r2127971345