RFR: 8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

[Fei Yang]

Hi, please review this small improvement.
After logic shift right 56 bits, there is no need to zero extend the remaining 8-bit value.
The reason is that the upper bits will be all zeros as this is a logic shift right.
Testing: `hotspot:tier1` is clean on linux-riscv64 platform with this change.

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Commit messages:
 - 8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

Changes: https://git.openjdk.org/jdk/pull/23879/files
  Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=23879&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8351101
  Stats: 1 line in 1 file changed: 0 ins; 1 del; 0 mod
  Patch: https://git.openjdk.org/jdk/pull/23879.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/23879/head:pull/23879

PR: https://git.openjdk.org/jdk/pull/23879