RFR: 8351145: RISC-V: only enable some crypto intrinsic when AvoidUnalignedAccess == false

[Fei Yang]

On Tue, 4 Mar 2025 16:11:41 GMT, Hamlin Li <mli at openjdk.org> wrote:

> Hi,
> Can you help to review the patch?
> 
> Depending whether a cpu supports fast misaligned access or not, the misaligned access can impact the performance a lot.
> Some crypto intrinsic implementation on riscv do not consider data alignment and just use `ld` to load input byte array, and seems there is no way to do it, the main reason is that at java API level, the input byte array to these JVM intrinsic could be part of a real java array, so the input byte array could be 1/2...7 byte aligned.
> And with the introduction of COH, it would be even complicated to do the input data alignment.
> 
> So, for the consistency of performance, seems it's better to disable these intrinsics when AvoidUnalignedAccess == true.
> And the user can still enable the intrinsics explicitly on a CPU with AvoidUnalignedAccess == true if they want so.
> 
> Thanks!

Thanks for finding this!

-------------

Marked as reviewed by fyang (Reviewer).

PR Review: https://git.openjdk.org/jdk/pull/23903#pullrequestreview-2660934134