RFR: 8356159: RISC-V: Add Zabha [v4]

[Fei Yang]

On Tue, 20 May 2025 12:11:38 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/riscv.ad line 5820:
>> 
>>> 5818:   ins_encode %{
>>> 5819:     __ cmpxchg(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int8,
>>> 5820:               /*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register);
>> 
>> Indentation.
>
> Looks like the other one below:
> 
>   ins_encode %{
>     __ cmpxchg_narrow_value(as_Register($mem$$base), $oldval$$Register, $newval$$Register, Assembler::int16,
>                             /*acquire*/ Assembler::aq, /*release*/ Assembler::rl, $res$$Register,
>                             /*result_as_bool*/ false, $tmp1$$Register, $tmp2$$Register, $tmp3$$Register);
>   %}
> 
> 
> No ?

Seems lacking one space on the left.

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PR Review Comment: https://git.openjdk.org/jdk/pull/25252#discussion_r2099111318