RFR: 8367098: RISC-V: sync CPU features with related JVM flags for dependant ones

[Fei Yang]

On Mon, 8 Sep 2025 12:15:31 GMT, Hamlin Li <mli at openjdk.org> wrote:

> Hi,
> Can you help to review this patch?
> 
> some extensions depends on another one, for example, zvbb depends on rvv.
> That means if rvv is disabled or not supported by the CPU, UseZvbb should return false, and zvbb should not appear in cpu string.
> But the currently, the cpu string contains zvbb even if rvv is disabled, which is not right.
> This needs to be fixed.
> 
> Thanks
> 
> before fix, output for `-XX-UseRVV -Xlog:cpu*=debug`
> 
> [0.064s][info ][os,cpu] CPU: total 32 (initial active 32) qemu rv64 rvi rvm rva rvf rvd rvc rvv zicbom zicboz zicbop zba zbb zbs zbkb zcb zfa zfh zfhmin zicsr zifencei zic64b ztso zacas zvbb zvbc zvfh zicond
> 
> 
> after fix, output for `-XX-UseRVV -Xlog:cpu*=debug`
> 
> [0.065s][info ][os,cpu] CPU: total 32 (initial active 32) qemu rv64 rvi rvm rva rvf rvd rvc zicbom zicboz zicbop zba zbb zbs zbkb zcb zfa zfh zfhmin zicsr zifencei zic64b ztso zacas zicond

LGTM! Thanks for fixing this!

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Marked as reviewed by fyang (Reviewer).

PR Review: https://git.openjdk.org/jdk/pull/27142#pullrequestreview-3199554769