RFR: 8367066: RISC-V: refine register selection in MacroAssembler:: decode_klass_not_null

[Fei Yang]

On Tue, 9 Sep 2025 14:09:47 GMT, Hamlin Li <mli at openjdk.org> wrote:

> I think we can further simplify the code in `decode_klass_not_null`, pleaes check the latest commit. Test running...

Yes, the code now looks more simplified. Thanks.

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PR Comment: https://git.openjdk.org/jdk/pull/27138#issuecomment-3272775297