Improve UseAVX setting and add cpu descriptions for zhaoxin processors.
Vic Wang(BJ-RD)
VicWang at zhaoxin.com
Thu Sep 11 13:33:36 UTC 2025
Hi All
Here is the patch that improving the UseAVX setting and add cpu descriptions for zhaoxin processors.
Can you help to review the patch and assign a number for a pull request?
Thank you!
Patch in my fork repository:
https://github.com/Double-Minds-JV/jdk/commit/06498b42ed54021b3ed14a9ccc9adf52e9360c9c
>diff --git a/src/hotspot/cpu/x86/vm_version_x86.cpp b/src/hotspot/cpu/x86/vm_version_x86.cpp
>index 094ab370190..4043b29f18c 100644
>--- a/src/hotspot/cpu/x86/vm_version_x86.cpp
>+++ b/src/hotspot/cpu/x86/vm_version_x86.cpp
>@@ -931,9 +931,17 @@ void VM_Version::get_processor_features() {
> if (UseSSE < 1)
> _features.clear_feature(CPU_SSE);
>
>- //since AVX instructions is slower than SSE in some ZX cpus, force USEAVX=0.
>- if (is_zx() && ((cpu_family() == 6) || (cpu_family() == 7))) {
>- UseAVX = 0;
>+ // ZX cpus specific settings
>+ if (is_zx() && FLAG_IS_DEFAULT(UseAVX)) {
>+ if (cpu_family() == 7) {
>+ if (extended_cpu_model() == 0x5B || extended_cpu_model() == 0x6B) {
>+ UseAVX = 1;
>+ } else if (extended_cpu_model() == 0x1B || extended_cpu_model() == 0x3B) {
>+ UseAVX = 0;
>+ }
>+ } else if (cpu_family() == 6) {
>+ UseAVX = 0;
>+ }
> }
>
> // UseSSE is set to the smaller of what hardware supports and what
>@@ -2592,6 +2600,7 @@ void VM_Version::resolve_cpu_information_details(void) {
>
> const char* VM_Version::cpu_family_description(void) {
> int cpu_family_id = extended_cpu_family();
>+ int cpu_model_id = extended_cpu_model();
> if (is_amd()) {
> if (cpu_family_id < ExtendedFamilyIdLength_AMD) {
> return _family_id_amd[cpu_family_id];
>@@ -2605,6 +2614,22 @@ const char* VM_Version::cpu_family_description(void) {
> return _family_id_intel[cpu_family_id];
> }
> }
>+ if (is_zx()) {
>+ if (cpu_family_id == 7) {
>+ switch (cpu_model_id) {
>+ case 0x1B:
>+ return "wudaokou";
>+ case 0x3B:
>+ return "lujiazui";
>+ case 0x5B:
>+ return "yongfeng";
>+ case 0x6B:
>+ return "shijidadao";
>+ }
>+ } else if (cpu_family_id == 6) {
>+ return "zhangjiang";
>+ }
>+ }
> if (is_hygon()) {
> return "Dhyana";
> }
>@@ -2624,6 +2649,9 @@ int VM_Version::cpu_type_description(char* const buf, size_t buf_len) {
> } else if (is_amd()) {
> cpu_type = "AMD";
> x64 = cpu_is_em64t() ? " AMD64" : "";
>+ } else if (is_zx()) {
>+ cpu_type = "Zhaoxin";
>+ x64 = cpu_is_em64t() ? " x86_64" : "";
> } else if (is_hygon()) {
> cpu_type = "Hygon";
> x64 = cpu_is_em64t() ? " AMD64" : "";
>@@ -3236,6 +3264,12 @@ int VM_Version::allocate_prefetch_distance(bool use_watermark_prefetch) {
> } else {
> return 128; // Athlon
> }
>+ } else if (is_zx()) {
>+ if (supports_sse2()) {
>+ return 256;
>+ } else {
>+ return 128;
>+ }
> } else { // Intel
> if (supports_sse3() && is_intel_server_family()) {
> if (supports_sse4_2() && supports_ht()) { // Nehalem based cpus
I have run the jtreg tests after applying the patch, the test-summary shows follows:
>==============================
>Test summary
>==============================
> TEST TOTAL PASS FAIL ERROR SKIP
> jtreg:test/hotspot/jtreg:tier1 3107 2797 0 0 310
> jtreg:test/jdk:tier1 2513 2472 0 0 41
> jtreg:test/langtools:tier1 4668 4656 0 0 12
> jtreg:test/jaxp:tier1 0 0 0 0 0
> jtreg:test/lib-test:tier1 38 38 0 0 0
>==============================
>TEST SUCCESS
Best Regards!
Vic Wang
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