RFR: 8367103: RISC-V: store cpu features in a bitmap [v3]

[Fei Yang]

On Mon, 15 Sep 2025 13:07:36 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Hi,
>> Can you help to review this patch?
>> 
>> Currently, the cpu features of riscv are stored in separate RVFeature subclasses.
>> But to support the store/restore CPU features for aot in the future, we need to store the cpu features in a continuous memory.
>> As the riscv extensions are introduced continuously, I think it's better to do it via an simple bitmap at the beginning.
>> Currently, just suppose the non-extension features will not be stored in aot image, so I also split the extension and non-extenion features. When we implement the related aot feature in the short future, we can revisit the way of splitting the features. Currently, just change the storage way of cpu features, lay the foundation for future aot.
>> 
>> Thanks
>
> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
> 
>   refine

src/hotspot/cpu/riscv/vm_version_riscv.hpp line 258:

> 256:   decl(mimpid           ,  ImpId           ,  RV_NO_FLAG_BIT,  false,  NO_UPDATE_DEFAULT)                  \
> 257:   decl(satp_mode        ,  SATP            ,  RV_NO_FLAG_BIT,  false,  NO_UPDATE_DEFAULT)                  \
> 258:   decl(zicboz_block_size, "ZicbozBlockSize",  RV_NO_FLAG_BIT,  false,  NO_UPDATE_DEFAULT)                  \

Hmm, why is this `"ZicbozBlockSize"` different from friends? Do we need the double quotes?

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PR Review Comment: https://git.openjdk.org/jdk/pull/27152#discussion_r2354630103