RFR: 8367103: RISC-V: store cpu features in a bitmap [v4]

[Fei Yang]

On Mon, 22 Sep 2025 08:29:01 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/vm_version_riscv.hpp line 238:
>> 
>>> 236:   decl(ext_Zvfh         ,  Zvfh        ,  RV_NO_FLAG_BIT,  30,  true ,  UPDATE_DEFAULT_DEP(UseZvfh, ext_V)) \
>>> 237:   decl(ext_Zvkn         ,  Zvkn        ,  RV_NO_FLAG_BIT,  31,  true ,  UPDATE_DEFAULT_DEP(UseZvkn, ext_V)) \
>>> 238:   decl(ext_Zicond       ,  Zicond      ,  RV_NO_FLAG_BIT,  32,  true ,  UPDATE_DEFAULT(UseZicond))          \
>> 
>> I assume the `cpu feature index` field is not subject to change in the future when we have AOT support, right? Then I think the code will be cleaner if we group these features in aphabetic order before that.
>
> There is dependency between some extensions, which enforce some order not subject to this constraint. So, not sure if it's an good idea to force the aphabetic order, especailly in this pr.
> If you think it's necessary to do so, I can do it in another separate pr, and I hope to do it after https://github.com/openjdk/jdk/pull/27171.

Sure. That works for me. Thanks.

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PR Review Comment: https://git.openjdk.org/jdk/pull/27152#discussion_r2371427726