RFR: 8368732: RISC-V: Detect support for misaligned vector access via hwprobe [v2]
Hamlin Li
mli at openjdk.org
Fri Sep 26 08:39:26 UTC 2025
On Fri, 26 Sep 2025 08:11:11 GMT, Fei Yang <fyang at openjdk.org> wrote:
>> Hi, this is a followup change after [JDK-8368366](https://bugs.openjdk.org/browse/JDK-8368366).
>>
>> According to the latest RISC-V linux hardware probing syscall [1], the performance of misaligned memory accesses has been divided into two cases: `RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF` and `RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF` for scalar and vector respectively.
>>
>> This aligns `AlignVector` with `RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF`. That is if the misaligned vector access is fast, we set `AlignVector` to false in the hope that it will save instructions handling address alignment thus improves performance.
>>
>> This choose to keep the use of `RISCV_HWPROBE_KEY_CPUPERF_0` which is now deprecated and returns similar values
>> to `RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF` for backward compatibility with old linux kernels.
>>
>> Manually checked the result on platforms w/wo fast misaligned vector accesses by running:
>> `$java -XX:+PrintFlagsFinal -version | grep AlignVector`
>>
>> [1] https://docs.kernel.org/arch/riscv/hwprobe.html
>
> Fei Yang has refreshed the contents of this pull request, and previous commits have been removed. The incremental views will show differences compared to the previous content of the PR. The pull request contains three new commits since the last revision:
>
> - More white spaces
> - White spaces
> - 8368732: RISC-V: Detect support for misaligned vector access via hwprobe
src/hotspot/cpu/riscv/vm_version_riscv.cpp line 181:
> 179: }
> 180:
> 181: if (FLAG_IS_DEFAULT(AlignVector) && unaligned_vector.enabled()) {
Seems this `unaligned_vector.enabled` is not necessary?
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PR Review Comment: https://git.openjdk.org/jdk/pull/27512#discussion_r2381389978
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