Integrated: 8368732: RISC-V: Detect support for misaligned vector access via hwprobe

[Fei Yang]

On Fri, 26 Sep 2025 06:28:39 GMT, Fei Yang <fyang at openjdk.org> wrote:

> Hi, this is a followup change after [JDK-8368366](https://bugs.openjdk.org/browse/JDK-8368366).
> 
> According to the latest RISC-V linux hardware probing syscall [1], the performance of misaligned memory accesses has been divided into two cases: `RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF` and `RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF` for scalar and vector respectively. 
> 
> This aligns `AlignVector` with `RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF`. That is if the misaligned vector access is fast, we set `AlignVector` to false in the hope that it will save instructions handling address alignment thus improves performance.
> 
> This choose to keep the use of `RISCV_HWPROBE_KEY_CPUPERF_0` which is now deprecated and returns similar values
> to `RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF` for backward compatibility with old linux kernels.
> 
> Manually checked the result on platforms w/wo fast misaligned vector accesses by running: 
> `$java -XX:+PrintFlagsFinal -version | grep AlignVector`
> 
> [1] https://docs.kernel.org/arch/riscv/hwprobe.html

This pull request has now been integrated.

Changeset: 538a722c
Author:    Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/538a722c2e9123cc575355879ff230444cf2dadc
Stats:     61 lines in 4 files changed: 47 ins; 1 del; 13 mod

8368732: RISC-V: Detect support for misaligned vector access via hwprobe

Reviewed-by: mli, dzhang

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PR: https://git.openjdk.org/jdk/pull/27512