RFR: 8377507: Store cpu features in AOTCodeCache [v4]

Vladimir Kozlov kvn at openjdk.org
Sat Feb 14 02:03:54 UTC 2026


On Fri, 13 Feb 2026 02:26:24 GMT, Ashutosh Mehra <asmehra at openjdk.org> wrote:

>> This PR adds the ability to cache and validate cpu features in the AOTCodeCache. It adds new APIs to `Abstract_VM_Version` to facilitate retrieval, storage and validation of cpu features between assembly phase and production run. Default implementation of these APIs is no-op. Each platform that supports AOTCodeCache can implement these APIs in the arch-specific `VM_Version` class.
>> This patch follows the Leyden premain implementation. It allows the cpu feature set of the production run to be a super-set of that of the assembly phase. This may change in future if we decide to that the cpu feature set should be the exact match.
>
> Ashutosh Mehra has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix compile failures
>   
>   Signed-off-by: Ashutosh Mehra <asmehra at redhat.com>

2 tests failed on Aarch64 even without AOT:
compiler/intrinsics/sha/cli/TestUseSHA1IntrinsicsOptionOnUnsupportedCPU.java
  java.lang.AssertionError: Option 'UseSHA1Intrinsics' is expected to have 'false' value, but is 'UseSHA1Intrinsics                        = t'.
compiler/cpuflags/TestAESIntrinsicsOnUnsupportedConfig.java
  Expected message not found: 'warning: AES instructions are not available on this CPU'.

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PR Comment: https://git.openjdk.org/jdk/pull/29655#issuecomment-3900440189


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