Pls review 7142113: Add Ivy Bridge to the known Intel x86 cpu families (S)

[Paul Hohensee]

Would you point me at where you got the info, pls?

Seems like both 42 and 45 are Sandy Bridge, just different versions.

Paul

On 2/16/12 10:46 AM, Vladimir Kozlov wrote:
> Family 6, Model 26 (1Ah) = 45 nm Core i7 and Xeon (Nehalem)
> Family 6, Model 30 (1Eh) = 45 nm Core i5/i7 and Xeon (Nehalem)
> Family 6, Model 37 (25h) = 32 nm Core i3 (and mobile Core i5/i7) 
> (Westmere)
> Family 6, Model 42 (2Ah) = 32 nm Core i5/i7 (Sandy Bridge)
> Family 6, Model 44 (2Ch) = 32 nm Core i7 and Westmere-EP
> Family 6, Model 45 (2Dh) = Sandy Bridge-EP
> Family 6, Model 46 (2Eh) = Nehalem-EX
> Family 6, Model 47 (2Fh) = Westmere-EX/E7
>
> But ask Intel first.
>
> Vladimir
>
> On 2/16/12 6:55 AM, Paul Hohensee wrote:
>> You're welcome.
>>
>> I found a Sandy Bridge machine in the Intel collab farm that has a
>> model number of 45, so I'm going to keep both the documented
>> value of 42 and the apparently undocumented value of 45.
>>
>> New webrev here
>>
>> http://cr.openjdk.java.net/~phh/7142113.01/
>>
>> Absent objection, I'll push this version.
>>
>> Paul
>>
>> On 2/16/12 3:33 AM, Markus Grönlund wrote:
>>> Looks good Paul, thanks for doing this.
>>>
>>> I can tick off the IvyBridge CPUID on my list.
>>>
>>> Cheers
>>> Markus
>>>
>>>> -----Original Message-----
>>>> From: Paul Hohensee
>>>> Sent: den 16 februari 2012 03:44
>>>> To: Karen Kinnear
>>>> Cc: hotspot-runtime-dev at openjdk.java.net
>>>> Subject: Re: Pls review 7142113: Add Ivy Bridge to the known Intel x86
>>>> cpu families (S)
>>>>
>>>> Thank you, Karen,
>>>>
>>>> Paul
>>>>
>>>> On 2/15/12 8:08 PM, Karen Kinnear wrote:
>>>>> Paul,
>>>>>
>>>>> Looks good - and thanks for fixing the SANDYBRIDGE id as well.
>>>>>
>>>>> thanks,
>>>>> Karen
>>>>>
>>>>> On Feb 15, 2012, at 4:53 PM, Paul Hohensee wrote:
>>>>>
>>>>>> Webrev here
>>>>>>
>>>>>> http://cr.openjdk.java.net/~phh/7142113.00/
>>>>>>
>>>>>> Intel documentation (attached to the CR) says that the Ivy Bridge
>>>> extended
>>>>>> model number is 0x3a.
>>>>>>
>>>>>> I changed the cpuExtendedModel values from decimal to hex, since hex
>>>> is
>>>>>> what's used in the Intel documentation. I also changed
>>>> CPU_MODEL_SANDYBRIDGE_EP
>>>>>> from 0x2d == 45 to the correct 0x2a and added *_EX model values for
>>>>>> later use: see comment in is_intel_tsc_synced_at_init().
>>>>>>
>>>>>> Tested on a Sandy Bridge machine via debugging tty->print_cr(). I
>>>> don't
>>>>>> have access to an Ivy Bridge machine.
>>>>>>
>>>>>> Thanks,
>>>>>>
>>>>>> Paul
>>>>>>
>>>>>>