RFR(M): 8155949: Support relaxed semantics in cmpxchg

[Andrew Haley]

On 05/19/2016 09:17 PM, Kim Barrett wrote:

> I’m not sure about aarch64, since it uses a compiler intrinsic
> (__sync_val_compare_and_swap) whose expansion I don’t know where to
> find.

I don't think there's a post-barrier when there is no store.  This
might be a bug in GCC, given that the spec is

"In most cases, these built-in functions are considered a 'full
barrier'.  That is, no memory operand is moved across the operation,
either forward or backward.  Further, instructions are issued as
necessary to prevent the processor from speculating loads across the
operation and from queuing stores after the operation."

Andrew.