[PATCH] Disable ARMv6 memory barriers on ARMv5 processors

Boris Ulasevich boris.ulasevich at bell-sw.com
Tue Nov 13 10:14:28 UTC 2018


Hi Jakub,

   For me the patch is good.
   Thank you for doing this!

regards,
Boris

On 13.11.2018 1:44, David Holmes wrote:
> Hi Jakub,
> 
> This patch seems reasonable to me. I've cc'd Boris at BellSoft to make 
> sure he sees this.
> 
> Thanks,
> David
> 
> On 13/11/2018 8:33 AM, Jakub Vaněk wrote:
>> Hi,
>>
>> This patch disables ARMv6+ memory barriers on older ARM processors.
>> This is implemented by adding a check to the non-ARMv7 code path if it
>> is an ARMv6. When this extra check is not performed, the code crashes
>> with illegal instruction. On ARMv5, I believe these memory barriers
>> are not necessary, because there is always only one processor.
>>
>> We know that processors older than ARMv7 are not supported in OpenJDK.
>> However, we are so far successfully patching new OpenJDK to run on the
>> Lego Mindstorms EV3 brick (ARM926EJ-S CPU). The project can be found
>> at https://github.com/ev3dev-lang-java/openjdk-ev3 . We want to
>> minimize the number of maintained patches, so we want to upstream
>> whatever is possible.
>>
>> This patch was built many times as part of our CI jobs hosted on Adopt
>> OpenJDK infrastructure: https://ci.adoptopenjdk.net/view/ev3dev/ We
>> have not yet run full jtreg tests on the target platform, but Juan
>> Antonio Brena Moral invested his time into Adopt's openjdktests in
>> QEMU.
>>
>> Regards,
>>
>> Jakub Vanek
>>
>> # HG changeset patch
>> # User Jakub Vaněk <linuxtardis at gmail.com>
>> # Date 1542059840 -3600
>> #      Mon Nov 12 22:57:20 2018 +0100
>> # Node ID 97525849d04b8e911bf592dd03d3518dd33bc552
>> # Parent  a609d549992a4d094a514a6c0f5b79443192d8bf
>> Disable ARMv6 memory barriers on ARMv5 processors
>>
>> diff --git a/src/hotspot/cpu/arm/assembler_arm_32.hpp
>> b/src/hotspot/cpu/arm/assembler_arm_32.hpp
>> --- a/src/hotspot/cpu/arm/assembler_arm_32.hpp
>> +++ b/src/hotspot/cpu/arm/assembler_arm_32.hpp
>> @@ -498,7 +498,7 @@
>>     void dmb(DMB_Opt opt, Register reg) {
>>       if (VM_Version::arm_arch() >= 7) {
>>         emit_int32(0xF57FF050 | opt);
>> -    } else {
>> +    } else if (VM_Version::arm_arch() == 6) {
>>         bool preserve_tmp = (reg == noreg);
>>         if(preserve_tmp) {
>>           reg = Rtemp;
>> diff --git a/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp
>> b/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp
>> --- a/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp
>> +++ b/src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp
>> @@ -63,7 +63,7 @@
>>        __asm__ volatile (
>>        ".word 0xF57FF050 | 0xf" : : : "memory");
>>   #endif
>> -   } else {
>> +   } else if (VM_Version::arm_arch() == 6) {
>>        intptr_t zero = 0;
>>        __asm__ volatile (
>>          "mcr p15, 0, %0, c7, c10, 5"
>> @@ -80,7 +80,7 @@
>>        __asm__ volatile (
>>        ".word 0xF57FF050 | 0xe" : : : "memory");
>>   #endif
>> -   } else {
>> +   } else if (VM_Version::arm_arch() == 6) {
>>        intptr_t zero = 0;
>>        __asm__ volatile (
>>          "mcr p15, 0, %0, c7, c10, 5"
>>


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