RFR: 8253843: AArch64: Use ishst for storestore barrier

[Alan Hayward]

AArch64 orderAccess uses gcc built in atomic functions, which expand
inline to DMB barrier instructions.  Specifically, they call the following:

FULL_MEM_BARRIER -> DMB ISH
READ_MEM_BARRIER -> DMB ISHLD
WRITE_MEM_BARRIER -> DMB ISH

However, storestore should be optimised to use ISHST.

In addition, __sync_synchronize is marked as legacy. See:
https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html

In order for the code to match, I switched everything to call dmbs directly.

Also, add AArch64 to the orderAccess documentation table.

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Commit messages:
 - AArch64: Use ishst for storestore barrier

Changes: https://git.openjdk.java.net/jdk/pull/427/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk&pr=427&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8253843
  Stats: 37 lines in 3 files changed: 11 ins; 0 del; 26 mod
  Patch: https://git.openjdk.java.net/jdk/pull/427.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/427/head:pull/427

PR: https://git.openjdk.java.net/jdk/pull/427