RFR: 8351997: AArch64: Interpreter volatile reference stores with G1 are not sequentially consistent

Andrew Haley aph at openjdk.org
Wed May 28 13:48:54 UTC 2025


On Wed, 28 May 2025 13:25:52 GMT, Fredrik Bredberg <fbredberg at openjdk.org> wrote:

> I tried to follow the `r5` register to see if it's safe to use, and got a bit scared when I saw that that `r5` is used inside `TemplateTable::load_resolved_field_entry()` as a temp register when calling `MacroAssembler::resolve_oop_handle()`. But that's no problem since `is_static` is `false`. Doing manual register allocation in the interpreter is a roller coaster that travels between hope and despair.

Indeed, yes. My only defence is that I was following the practice in the x86 port. It's not much of an excuse, but there it is...

> Maybe we should add an `assert_different_registers()` statement that includes both `r5` and `rscratch2` after `if (is_static)` in `TemplateTable::load_resolved_field_entry()`?

That wouldn't hurt.

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PR Comment: https://git.openjdk.org/jdk/pull/25483#issuecomment-2916427018


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