git: openjdk/jdk: 8292575: riscv: Represent Registers as values

[Fei Yang]

Changeset: 21a73695
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
Date:      2022-08-30 09:24:37 +0000
URL:       https://git.openjdk.org/jdk/commit/21a736954f4e6a9b41b382908d1875518c4caccb

8292575: riscv: Represent Registers as values

Reviewed-by: yzhu, yadongwang, fyang

! src/hotspot/cpu/riscv/assembler_riscv.hpp
! src/hotspot/cpu/riscv/c1_Defs_riscv.hpp
! src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/interp_masm_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/registerMap_riscv.cpp
! src/hotspot/cpu/riscv/register_riscv.cpp
! src/hotspot/cpu/riscv/register_riscv.hpp
! src/hotspot/cpu/riscv/riscv.ad
! src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp
! src/hotspot/cpu/riscv/stubGenerator_riscv.cpp
! src/hotspot/cpu/riscv/vmreg_riscv.cpp
! src/hotspot/cpu/riscv/vmreg_riscv.hpp
! src/hotspot/cpu/riscv/vmreg_riscv.inline.hpp