git: openjdk/jdk: 8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec

[Fei Yang]

Changeset: 1169dc06
Author:    Dingli Zhang <dzhang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
Date:      2022-11-08 02:48:19 +0000
URL:       https://git.openjdk.org/jdk/commit/1169dc066c0257da1a237960b8c0cc4782ef8d14

8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec

Reviewed-by: luhenry, fyang

! src/hotspot/cpu/riscv/assembler_riscv.hpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/riscv_v.ad