git: openjdk/jdk: 8305728: RISC-V: Use bexti instruction to do single-bit testing

[Fei Yang]

Changeset: 13751302
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
Date:      2023-04-11 03:00:54 +0000
URL:       https://git.openjdk.org/jdk/commit/137513025dad06fc08818fa832edb4a487298f81

8305728: RISC-V: Use bexti instruction to do single-bit testing

Reviewed-by: fyang, yzhu

! src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
! src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp
! src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/interp_masm_riscv.cpp
! src/hotspot/cpu/riscv/interp_masm_riscv.hpp
! src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
! src/hotspot/cpu/riscv/riscv.ad
! src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp
! src/hotspot/cpu/riscv/stubGenerator_riscv.cpp
! src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp
! src/hotspot/cpu/riscv/templateTable_riscv.cpp