git: openjdk/jdk: master: 8346478: RISC-V: Refactor add/sub assembler routines

Fei Yang fyang at openjdk.org
Thu Jan 9 11:38:38 UTC 2025


Changeset: 8c87ea2b
Branch: master
Author:    Fei Yang <fyang at openjdk.org>
Date:      2025-01-09 11:36:40 +0000
URL:       https://git.openjdk.org/jdk/commit/8c87ea2bdf6e1aea5fdca4624d7b7fe590d33a37

8346478: RISC-V: Refactor add/sub assembler routines

Reviewed-by: fjiang, rehn, gcao

! src/hotspot/cpu/riscv/assembler_riscv.hpp
! src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp
! src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
! src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp
! src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/gc/g1/g1BarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/gc/shared/cardTableBarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/gc/z/zBarrierSetAssembler_riscv.cpp
! src/hotspot/cpu/riscv/interp_masm_riscv.cpp
! src/hotspot/cpu/riscv/interpreterRT_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
! src/hotspot/cpu/riscv/riscv.ad
! src/hotspot/cpu/riscv/riscv_b.ad
! src/hotspot/cpu/riscv/runtime_riscv.cpp
! src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp
! src/hotspot/cpu/riscv/stubGenerator_riscv.cpp
! src/hotspot/cpu/riscv/templateInterpreterGenerator_riscv.cpp
! src/hotspot/cpu/riscv/templateTable_riscv.cpp



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