CFV: New JDK Committer: Feilong Jiang

[Robbin Ehn]

Vote: yes

/Robbin

On Mon, 2023-06-12 at 09:28 +0800, yangfei at iscas.ac.cn wrote:
> I here by nominate Feilong Jiang (fjiang) [0] to JDK Committer.
> 
> Feilong is a member of Huawei JVM Team and is actively working on RISC-V maintenance and feature implementation.
> He has authored 33 changes in openjdk/jdk [1] and 19 changes in openjdk/riscv-port [2]. Notable changes include porting
> Foreign Function & Memory API to RISC-V [3] and adding support for RISC-V Bitmanipulation extension [4, 5, 6, 7, 8, 9].
> Having the committer role would aid his work by avoiding the need to wait for sponsorship of fixes, after review & approval.
> 
> Votes are due by 12:00 UTC on Monday, the 26th of June, 2023.
> 
> Only current JDK Committers [10] are eligible to vote on this nomination.
> 
> Votes must be cast in the open by replying to this mailing list.
> 
> For Lazy Consensus voting instructions, see [11].
> 
> Thank you,
> Fei Yang
> 
> [0] https://openjdk.org/census#fjiang
> [1] https://github.com/openjdk/jdk/pulls?q=is%3Apr+author%3Afeilongjiang+is%3Aclosed+label%3Aintegrated
> [2] https://github.com/openjdk/riscv-port/pulls?q=is%3Apr+author%3Afeilongjiang+is%3Aclosed+label%3Aintegrated
> [3] https://github.com/openjdk/jdk/pull/11004
> [4] https://github.com/openjdk/riscv-port/pull/37
> [5] https://github.com/openjdk/riscv-port/pull/39
> [6] https://github.com/openjdk/riscv-port/pull/42
> [7] https://github.com/openjdk/riscv-port/pull/43
> [8] https://github.com/openjdk/riscv-port/pull/45
> [9] https://github.com/openjdk/riscv-port/pull/47
> [10] https://openjdk.org/census
> [11] https://openjdk.org/projects/#committer-vote