[aarch64-port-dev ] RFR(S): 8248851: CMS: Missing memory fences between free chunk check and klass read

[Andrew Haley]

On 16/07/2020 10:16, David Holmes wrote:
> Seems to me that you want OrderAccess::loadload() barriers to order the
> loads, not OrderAccess::acquire(). You should only use acquire semantics
> to pair with a corresponding release operation.

I agree, but it's unlikely to matter in practice.

Having said that, I'm strongly of the opinion that if you see a naked
StoreStore it may well be a bug, or at least you've got something very
hard to analyse. I know of a few cases (e.g. zeroing an object) where
this isn't true.

https://www.hboehm.info/c++mm/no_write_fences.html, etc.

But that's an argument for another day.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671