[jdk17u-dev] RFR: 8265263: AArch64: Combine vneg with right shift count
Andrew Haley
aph at openjdk.org
Thu Oct 20 09:12:56 UTC 2022
On Thu, 20 Oct 2022 08:50:41 GMT, Hao Sun <haosun at openjdk.org> wrote:
>> This is a performance improvement for AArch64. There are several differences from the original change.
>>
>> https://bugs.openjdk.org/browse/JDK-8267356 (Vector API SVE codegen support) is not in 17u, so `UseSVE == 0` parts in predicates are missing/excluded.
>>
>> https://bugs.openjdk.org/browse/JDK-8288445 (C2 compilation fails) is a subsequent bugfix already backported in 17u, so some `immI` arguments in rules became `immI_positive`.
>>
>> https://bugs.openjdk.org/browse/JDK-8277239 (SIGSEGV in vrshift_reg_maskedNode::emit) is also related to Vector API and is not in 17u, so `!n->as_ShiftV()->is_var_shift()` is replaced by `VectorNode::is_vshift_cnt(n->in(2))`. This substitution may raise doubts.
>>
>> Testing: jtreg test/hotspot/jtreg/compiler, tier1, tier2 on aarch64.
>>
>> Performance improvements in the added benchmark VectorShiftRight on Graviton 2 for default size=1024 correspond to the original review:
>>
>>
>> rShiftByte 16%
>> rShiftInt 27%
>> rShiftLong 16%
>> rShiftShort 20%
>> urShiftByte 0%
>> urShiftChar 20%
>> urShiftInt 27%
>> urShiftLong 16%
>
> src/hotspot/cpu/aarch64/aarch64_neon.ad line 4254:
>
>> 4252: instruct vslcnt8B(vecD dst, iRegIorL2I cnt) %{
>> 4253: predicate(n->as_Vector()->length_in_bytes() == 4 ||
>> 4254: n->as_Vector()->length_in_bytes() == 8);
>
> We may improve the style here, i.e. removing the leading whitespace.
Not in a backport.
> src/hotspot/cpu/aarch64/aarch64_neon.ad line 4276:
>
>> 4274:
>> 4275: instruct vsrcnt8B(vecD dst, iRegIorL2I cnt) %{
>> 4276: predicate(UseSVE == 0 && (n->as_Vector()->length_in_bytes() == 4 ||
>
> As mentioned in the commit msg, I think `UseSVE == 0` check is not needed here.
Again, the place to fix that is JDK head.
-------------
PR: https://git.openjdk.org/jdk17u-dev/pull/811
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