[jdk17u-dev] RFR: 8276799: Implementation of JEP 422: Linux/RISC-V Port [v4]

[Ludovic Henry]

On Fri, 23 Jun 2023 10:03:14 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> The RISC-V port was originally developed at Huawei Technologies, then integrated into OpenJDK 19.
>> 
>> The 17u version of the port has continued to be maintained in the openjdk/riscv-port-jdk17u repo later
>> and has been tested for several months. There are few changes to shared HotSpot code (mostly the main
>> one is C1 conditional move/branch support for RISC-V). As required by 17u maintainer, changes to shared
>> code has been kept to a minimum. Only enabling shared changes are incorporated and these changes are
>> properly guarded with macro RISCV. So this 17u port should not breaking existing code and, although it is
>> a large patch, finally integrating it into 17u upstream should be low risk.
>> 
>> Testing on linux-riscv64 platform:
>> - [x] Bootcycle (release & fastdebug build)
>> - [x] Tier1-4 tests (release build)
>> - [x] Benchmark workloads (Dacapo, SPECJbb2015, SPECJVM2008, Renaissance. release build)
>
> Fei Yang has updated the pull request incrementally with one additional commit since the last revision:
> 
>   8285630: Fix a configure error in RISC-V cross build

It has completed a run of this PR on GHA at https://github.com/rivosinc/jdk17u-dev/actions/runs/5356181476. There are a few failing tests but they are either timeout or related to running in QEMU.

The test suites that have been run are:
- hs:tier1_compiler
- hs:tier1_compiler_not_xcomp
- hs:tier1_gc
- hs:tier1_runtime
- hs:tier1_serviceability
- jdk:tier1
- langtools:tier1

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PR Comment: https://git.openjdk.org/jdk17u-dev/pull/1427#issuecomment-1605330539