[jdk21u-dev] Integrated: 8320397: RISC-V: Avoid passing t0 as temp register to MacroAssembler:: cmpxchg_obj_header/cmpxchgptr

[Gui Cao]

On Tue, 15 Oct 2024 10:29:12 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, The same issue also exists in the jdk21u. I would like to backport this to jdk21u-dev. This is a risc-v specific change. Backport is clean, risk is low.
> 
> ### Testing
> - [x] Run tier1-3 tests on SOPHON SG2042 (release)

This pull request has now been integrated.

Changeset: f7660807
Author:    Gui Cao <gcao at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk21u-dev/commit/f7660807190f92d06c16c575326dc855f8b7d7a4
Stats:     78 lines in 5 files changed: 4 ins; 4 del; 70 mod

8320397: RISC-V: Avoid passing t0 as temp register to MacroAssembler:: cmpxchg_obj_header/cmpxchgptr

Backport-of: 0be0775a762edbefacf4188b4787b039153fe670

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PR: https://git.openjdk.org/jdk21u-dev/pull/1053