[8u/urgent] RFR: 8267689: [aarch64] Crash due to bad shift in indirect addressing mode

Andrew Haley aph at redhat.com
Thu May 27 12:45:51 UTC 2021


On 5/25/21 3:57 PM, Volker Simonis wrote:
> The problem is that on aarch64, indirect loads and stores can accept
> and index and a shift, but the shift has to correspond to the size of
> the load/store operation (e.g. shift==2 for 32-bit operations and
> shift==3 for 64-bit operations).

Yes, I remember that one.

> Usage of sun.misc.Unsafe can lead to
> address expressions which violate this requirement. They might for
> example request a shift of "1" for a 32-bit operation.

Well, they shouldn't. :-)

Your patch looks basically sane. There would have been an alternative
way, which would generate a two-instruction form in MacroAssembler, but
this looks okay too.

I asked adinn to review; then I'll approve it.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
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