RFR: Store cpu features in AOTCodeCache header

[Ashutosh Mehra]

This is the initial version of storing cpu features in the AOTCodeCache to verify runtime env has the same cpu capabilities as the assembly env. It covers both x86 and aarch64.
AOTCodeCache header is updated to store the cpu features in arch-dependent form (although its same for currently supported architectures - x86 and aarch64).

It also fixes a bug - the `polling_page_vectors_safepoint_handler_blob` can be null if AVX is not present on a system. This causes crash as this blob's entry point is stored in the address table.
I came across this when I did the assembly run with -XX:UseAVX=0 option.

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Commit messages:
 - Store cpu features in AOTCodeCache header

Changes: https://git.openjdk.org/leyden/pull/84/files
  Webrev: https://webrevs.openjdk.org/?repo=leyden&pr=84&range=00
  Stats: 330 lines in 8 files changed: 227 ins; 1 del; 102 mod
  Patch: https://git.openjdk.org/leyden/pull/84.diff
  Fetch: git fetch https://git.openjdk.org/leyden.git pull/84/head:pull/84

PR: https://git.openjdk.org/leyden/pull/84