AOT code usage restrictions

[ioi.lam at oracle.com]

On 1/23/26 1:35 PM, Andrew Haley wrote:
> On 1/23/26 7:30 PM, Vladimir Kozlov wrote:
>
>> I just want to point out that using generic instructions in AOT code
>> (AOTed adapters, stubs, nmethods) in deployment will force new JITed
>> code also use generic instructions. That is it - VM runtime (stack
>> walking, deoptimization, registers saving) requires generated code
>> (JITed and AOTed) to use the same set of instructions and registers.
>
> I hear you, but not entirely. Sure, we'll have to use the smaller 
> register sets in some cases, but there's nothing to stop us from using 
> a lot of newer instructions that run faster.
>
> I'm perhaps a bit biased here because AArch64, being newer, doesn't 
> have quite the same diversity of features as x86. And, with the 
> exception of a little bit of code that can use the extended SVE 
> register set, we don't have to worry about register file sizes there 
> either.
>

Vladimir,

I wonder if it's possible to test the impact of mixing "generic" AOT 
code and "native" JIT code in the Leyden repo:

- Disable CPU feature check in aotCodeCache.cpp

- Generate AOT code with some CPU features disabled using -XX: flags

- Execute production run with full CPU features. Run a sufficiently 
complex program.

Does it crash?