From liuqi at loongson.cn Sat Oct 16 01:20:53 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sat, 16 Oct 2010 16:20:53 +0800 Subject: Contributing to the development of openjdk mips port Message-ID: <20101016082053.GA19835@loongson.cn> Hi guys, My name is Liu Qi and I am from China Loongson Company. Currently, we are focusing on the development of MIPS compatible processors. Also we have a team working on the OpenJDK port to the MIPS platform. By now we have some preliminary results on that. You could reach the code repos. here: http://hg.printk.org/openjdk6-mips/ With these codes, we could run Java applications with the interpreter on MIPS machines. And by the end of the month, we will finish the debug of the c1 compiler. In the meantime, we want to merge our codes into the OpenJDK. The OpenJDK mips port leader Jonathan told me that we could use the MIPS porting project within OpenJDK. Do you have some advice on that? Also, we want to discuss some detail information about merging. Who should I talk to? Could you provide a name for us? Thanks. Regards, Qi -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From nullnut at hotmail.com Sat Oct 23 07:11:31 2010 From: nullnut at hotmail.com (null nut) Date: Sat, 23 Oct 2010 17:11:31 +0300 Subject: How is the China Loongson project going? Message-ID: I am interested in the project coming from china. How is it going? That would be wonderful if a stable JVM on MIPS is figured out. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://mail.openjdk.java.net/pipermail/mips-port/attachments/20101023/91742a09/attachment.html From liuqi at loongson.cn Sat Oct 23 07:20:13 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sat, 23 Oct 2010 22:20:13 +0800 Subject: How is the China Loongson project going? In-Reply-To: References: Message-ID: <20101023142013.GA5535@loongson.cn> On Sat, Oct 23, 2010 at 05:11:31PM +0300, null nut wrote: > I am interested in the project coming from china. > How is it going? > That would be wonderful if a stable JVM on MIPS is figured out. Hi, Here is the latest news about the OpenJDK-mips port: http://mail.openjdk.java.net/pipermail/distro-pkg-dev/2010-October/010640.html Just ask if you want any more information about this project. Regards, Qi -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From yangyongqiang at loongson.cn Sat Oct 23 09:19:59 2010 From: yangyongqiang at loongson.cn (YANG Yongqiang) Date: Sun, 24 Oct 2010 00:19:59 +0800 (CST) Subject: How is the China Loongson project going? In-Reply-To: References: Message-ID: <80ec2ec7ff4fa7183ef26556188bec17.squirrel@mail.loongson.cn> hi, Now, the interpreter could run stably. There are still some bugs in C1 compiler. Part of cases in SPECJvm2008 can pass using c1 compiler. > > I am interested in the project coming from china. > How is it going? > That would be wonderful if a stable JVM on MIPS is figured out. > ?????? ???????????????????????????????????????? ???????????????????????????????? From liuqi at loongson.cn Sun Oct 24 01:51:02 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sun, 24 Oct 2010 16:51:02 +0800 Subject: [openjdk6-mips] 2 new changesets: d3aee0aef6b6 and 7eeee95a5a53 Message-ID: <20101024085102.GA9517@loongson.cn> Hi guys, Yang Yongqiang has committed the following patches to the project openjdk6-mips: Fix five bugs related to safepoint_poll, double-precision operand, verify_oop operation and safepoint_return respectively. Avoid anti-dependency when moving long operand between registers(reg2reg) and enable the safepoint return. The mercurial repo. of project openjdk6-mips is located at: http://icedtea.classpath.org/hg/openjdk6-mips/ Also, we maintained a mirror located at: http://hg.printk.org/openjdk6-mips/ Regards, Qi -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Sun Oct 24 05:07:01 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sun, 24 Oct 2010 20:07:01 +0800 Subject: [openjdk6-mips] 1 new changesets: 89199c685d4a Message-ID: <20101024120701.GA14647@loongson.cn> Hi guys, Cai Songsong has committed the following patches to the project openjdk6-mips: Fix the compiling bug for the product version. The mercurial repo. of project openjdk6-mips is located at: http://icedtea.classpath.org/hg/openjdk6-mips/ Also, we maintained a mirror located at: http://hg.printk.org/openjdk6-mips/ Regards, Qi -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Sun Oct 24 08:03:54 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sun, 24 Oct 2010 23:03:54 +0800 Subject: [/hg/openjdk6-mips: Remove the useless code used for debugging.] Message-ID: <20101024150354.GA2787@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Sun, 24 Oct 2010 14:58:19 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Remove the useless code used for debugging. changeset 71f3d14ed0eb in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=71f3d14ed0eb author: YANG Yongqiang date: Sun Oct 24 21:58:11 2010 +0800 Remove the useless code used for debugging. diffstat: 1 file changed, 12 deletions(-) hotspot/src/share/vm/prims/jvm.cpp | 12 ------------ diffs (22 lines): diff -r 89199c685d4a -r 71f3d14ed0eb hotspot/src/share/vm/prims/jvm.cpp --- a/hotspot/src/share/vm/prims/jvm.cpp Mon Oct 25 01:07:09 2010 +0800 +++ b/hotspot/src/share/vm/prims/jvm.cpp Sun Oct 24 21:58:11 2010 +0800 @@ -234,18 +234,6 @@ JVM_ENTRY(void, JVM_ArrayCopy(JNIEnv *en arrayOop d = arrayOop(JNIHandles::resolve_non_null(dst)); assert(s->is_oop(), "JVM_ArrayCopy: src not an oop"); assert(d->is_oop(), "JVM_ArrayCopy: dst not an oop"); - - oop p = oop(JNIHandles::resolve_non_null(dst)); - if(dst_pos == badHeapWordVal || length == badHeapWordVal) { - //tty->print_cr("%s:%d: %x-%x %x-%x %x %x ", __FILE__, __LINE__, s, d, src_pos, dst_pos, length, p); - for(int i = 0; i < 4; i ++) { - tty->print("%x ",*((int*)p + i) ); - } - p->print(); - s->print(); - d->print(); - } - // Do copy Klass::cast(s->klass())->copy_array(s, src_pos, d, dst_pos, length, thread); JVM_END ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Mon Oct 25 01:22:08 2010 From: liuqi at loongson.cn (LIU Qi) Date: Mon, 25 Oct 2010 16:22:08 +0800 Subject: [liuqi@icedtea.classpath.org: /hg/openjdk6-mips: Fix a bug in computing the size of an array.] Message-ID: <20101025082208.GA12362@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Mon, 25 Oct 2010 08:19:37 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Fix a bug in computing the size of an array. changeset d1c481f44844 in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=d1c481f44844 author: YANG Yongqiang date: Mon Oct 25 15:43:04 2010 +0800 Fix a bug in computing the size of an array. The size of an array is computed with error in the stub (either new_type_array_id or new_object_array_id) which allocates space for arrays. diffstat: 1 file changed, 17 insertions(+), 18 deletions(-) hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp | 35 ++++++++++++-------------- diffs (74 lines): diff -r 71f3d14ed0eb -r d1c481f44844 hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp Sun Oct 24 21:58:11 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp Mon Oct 25 15:43:04 2010 +0800 @@ -894,26 +894,26 @@ OopMapSet* Runtime1::generate_code_for(S __ slt(AT, AT, length); __ bne(AT, ZERO, slow_path); __ delayed()->nop(); - + // if we got here then the TLAB allocation failed, so try // refilling the TLAB or allocating directly from eden. Label retry_tlab, try_eden; //T0,T1,T5,T8 have changed! - __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves ebx & edx + __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves T2 & T4 __ bind(retry_tlab); // get the allocation size: (length << (layout_helper & 0x1F)) + header_size __ lw(t1, klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes()); - __ srl(AT, t1, Klass::_lh_log2_element_size_shift); - __ andi(AT, AT, Klass::_lh_log2_element_size_mask); + __ andi(AT, t1, 0x1f); __ sllv(arr_size, length, AT); - __ srl(AT, t1, Klass::_lh_header_size_shift); - __ andi(AT, AT, Klass::_lh_header_size_mask); - __ add(arr_size, AT, arr_size); + __ srl(t1, t1, Klass::_lh_header_size_shift); + __ andi(t1, t1, Klass::_lh_header_size_mask); + __ add(arr_size, t1, arr_size); __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up - __ andi(arr_size, arr_size, ~MinObjAlignmentInBytesMask); + __ move(AT, ~MinObjAlignmentInBytesMask); + __ andr(arr_size, arr_size, AT); __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size @@ -921,6 +921,8 @@ OopMapSet* Runtime1::generate_code_for(S __ lbu(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); + assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); + assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); __ andi(t1, t1, Klass::_lh_header_size_mask); __ sub(arr_size, arr_size, t1); // body length __ add(t1, t1, obj); // body start @@ -932,19 +934,16 @@ OopMapSet* Runtime1::generate_code_for(S __ bind(try_eden); // get the allocation size: (length << (layout_helper & 0x1F)) + header_size __ lw(t1, klass, klassOopDesc::header_size() * HeapWordSize - + Klass::layout_helper_offset_in_bytes()); - __ srl(AT, t1, Klass::_lh_log2_element_size_shift); - __ andi(AT, AT, Klass::_lh_log2_element_size_mask); + + Klass::layout_helper_offset_in_bytes()); + __ andi(AT, t1, 0x1f); __ sllv(arr_size, length, AT); - __ srl(AT, t1, Klass::_lh_header_size_shift); - __ andi(AT, AT, Klass::_lh_header_size_mask); - __ add(arr_size, AT, arr_size); + __ srl(t1, t1, Klass::_lh_header_size_shift); + __ andi(t1, t1, Klass::_lh_header_size_mask); + __ add(arr_size, t1, arr_size); __ addi(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up - __ andi(arr_size, arr_size, ~MinObjAlignmentInBytesMask); - - + __ move(AT, ~MinObjAlignmentInBytesMask); + __ andr(arr_size, arr_size, AT); __ eden_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size - __ initialize_header(obj, klass, length,t1,t2); __ lbu(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Tue Oct 26 06:26:57 2010 From: liuqi at loongson.cn (LIU Qi) Date: Tue, 26 Oct 2010 21:26:57 +0800 Subject: [liuqi@icedtea.classpath.org: /hg/openjdk6-mips: Enable double-precision remainder related ope...] Message-ID: <20101026132657.GA23966@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Tue, 26 Oct 2010 13:25:13 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Enable double-precision remainder related ope... changeset 88ad8d87be77 in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=88ad8d87be77 author: YANG Yongqiang date: Tue Oct 26 20:09:04 2010 +0800 Enable double-precision remainder related operation. diffstat: 1 file changed, 3 insertions(+), 3 deletions(-) hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp | 6 +++--- diffs (16 lines): diff -r 817893aa0b86 -r 88ad8d87be77 hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Tue Oct 26 18:23:20 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Tue Oct 26 20:09:04 2010 +0800 @@ -3006,9 +3006,9 @@ void LIR_Assembler::arith_op(LIR_Code co case lir_div_strictfp: __ div_d(res, lreg, rreg); break; -// case lir_rem: -// __ rem_d(res, lreg, rreg); -// break; + case lir_rem: + __ rem_d(res, lreg, rreg); + break; default : ShouldNotReachHere(); } } ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Tue Oct 26 04:43:41 2010 From: liuqi at loongson.cn (LIU Qi) Date: Tue, 26 Oct 2010 19:43:41 +0800 Subject: [liuqi@icedtea.classpath.org: /hg/openjdk6-mips: Set TwoOperandLIRForm to true.] Message-ID: <20101026114340.GB21601@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Tue, 26 Oct 2010 11:36:46 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Set TwoOperandLIRForm to true. changeset 817893aa0b86 in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=817893aa0b86 author: YANG Yongqiang date: Tue Oct 26 18:23:20 2010 +0800 Set TwoOperandLIRForm to true. LIR used in mips is of TwoOperandLIRForm, so TwoOperandLIRForm should be set to true. diffstat: 1 file changed, 1 insertion(+), 1 deletion(-) hotspot/src/cpu/mips/vm/c1_globals_mips.hpp | 2 +- diffs (12 lines): diff -r d1c481f44844 -r 817893aa0b86 hotspot/src/cpu/mips/vm/c1_globals_mips.hpp --- a/hotspot/src/cpu/mips/vm/c1_globals_mips.hpp Mon Oct 25 15:43:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_globals_mips.hpp Tue Oct 26 18:23:20 2010 +0800 @@ -69,7 +69,7 @@ define_pd_global(bool, LIRFillDelaySlots define_pd_global(bool, LIRFillDelaySlots, false); define_pd_global(bool, OptimizeSinglePrecision, true); define_pd_global(bool, CSEArrayLength, false); -define_pd_global(bool, TwoOperandLIRForm, false); +define_pd_global(bool, TwoOperandLIRForm, true); define_pd_global(intx, SafepointPollOffset, 256); ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Thu Oct 28 01:42:07 2010 From: liuqi at loongson.cn (LIU Qi) Date: Thu, 28 Oct 2010 16:42:07 +0800 Subject: [liuqi@icedtea.classpath.org: /hg/openjdk6-mips: Fix 3 bugs related to the float remainder ope...] Message-ID: <20101028084207.GB12681@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Thu, 28 Oct 2010 08:21:51 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Fix 3 bugs related to the float remainder ope... changeset 85b046e5468b in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=85b046e5468b author: YANG Yongqiang date: Thu Oct 28 11:07:44 2010 +0800 Fix 3 bugs related to the float remainder operation. Fix three bugs related to float remainder operation, TwoOperandLIRForm and integer multiplication respectively: 1. In mips both single-precision and double-precision remainder operations need three registers except result, so they should be three-operand-operation. 2. We made a mistake which setting TwoOperandLIRForm to true. However, LIR mips used is not of TwoOperandLIRForm. 3. In operation, value of a source register must not be changed except that the source register is same as the result one. However, in function strength_reduce_multiply value of left source regiser is always changed. diffstat: 10 files changed, 186 insertions(+), 131 deletions(-) hotspot/src/cpu/mips/vm/assembler_mips.cpp | 29 +-- hotspot/src/cpu/mips/vm/assembler_mips.hpp | 4 hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp | 171 ++++++++++++---------- hotspot/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp | 82 ++++++---- hotspot/src/cpu/mips/vm/c1_globals_mips.hpp | 2 hotspot/src/cpu/mips/vm/templateTable_mips.cpp | 4 hotspot/src/share/vm/c1/c1_LIR.cpp | 17 ++ hotspot/src/share/vm/c1/c1_LIR.hpp | 4 hotspot/src/share/vm/c1/c1_LIRAssembler.hpp | 3 hotspot/src/share/vm/c1/c1_Runtime1.cpp | 1 diffs (truncated from 530 to 500 lines): diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/assembler_mips.cpp --- a/hotspot/src/cpu/mips/vm/assembler_mips.cpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/assembler_mips.cpp Thu Oct 28 11:07:44 2010 +0800 @@ -2304,24 +2304,23 @@ void MacroAssembler::cmpxchg8(Register x } // be sure the three register is different -void MacroAssembler::rem_s(FloatRegister fd, FloatRegister fs, FloatRegister ft) { - assert_different_registers(fd, fs, ft); - div_s(fd, fs, ft); - trunc_l_s(fd, fd); - cvt_s_l(fd, fd); - mul_s(fd, fd, ft); - sub_s(fd, fs, fd); +void MacroAssembler::rem_s(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp) { + assert_different_registers(tmp, fs, ft); + div_s(tmp, fs, ft); + trunc_l_s(tmp, tmp); + cvt_s_l(tmp, tmp); + mul_s(tmp, tmp, ft); + sub_s(fd, fs, tmp); } // be sure the three register is different -void MacroAssembler::rem_d(FloatRegister fd, FloatRegister fs, FloatRegister ft) { - assert_different_registers(fd, fs, ft); - - div_d(fd, fs, ft); - trunc_l_d(fd, fd); - cvt_d_l(fd, fd); - mul_d(fd, fd, ft); - sub_d(fd, fs, fd); +void MacroAssembler::rem_d(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp) { + assert_different_registers(tmp, fs, ft); + div_d(tmp, fs, ft); + trunc_l_d(tmp, tmp); + cvt_d_l(tmp, tmp); + mul_d(tmp, tmp, ft); + sub_d(fd, fs, tmp); } class ControlWord { diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/assembler_mips.hpp --- a/hotspot/src/cpu/mips/vm/assembler_mips.hpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/assembler_mips.hpp Thu Oct 28 11:07:44 2010 +0800 @@ -1278,8 +1278,8 @@ static void restore_registers(MacroAssem // Sign extension void sign_extend_short(Register reg) { shl(reg, 16); sar(reg, 16); } void sign_extend_byte(Register reg) { shl(reg, 24); sar(reg, 24); } - void rem_s(FloatRegister fd, FloatRegister fs, FloatRegister ft); - void rem_d(FloatRegister fd, FloatRegister fs, FloatRegister ft); + void rem_s(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp); + void rem_d(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp); // Inlined sin/cos generator for Java; must not use CPU instruction // directly on Intel as it does not have high enough precision diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_LIRAssembler_mips.cpp Thu Oct 28 11:07:44 2010 +0800 @@ -1241,7 +1241,17 @@ Address::ScaleFactor LIR_Assembler::arra void LIR_Assembler::emit_op3(LIR_Op3* op) { - switch (op->code()) { + switch (op->code()) { + case lir_frem: + arithmetic_frem( + op->code(), + op->in_opr1(), + op->in_opr2(), + op->in_opr3(), + op->result_opr(), + op->info()); + break; + case lir_idiv: case lir_irem: arithmetic_idiv( @@ -2855,39 +2865,7 @@ void LIR_Assembler::arith_op(LIR_Code co __ bind(done); } break; -//FIXME, where is the new div and rem? -/* case lir_div_strictfp: - case lir_div: - __ call(Runtime1::entry_for(Runtime1::ldiv_stub_id), relocInfo::runtime_call_type); - __ delayed()->nop(); - add_call_info(code_offset(), info); - - if ( dst_lo != V0 ) { - __ move(dst_lo, V0); - } - - if ( dst_hi != V1) { - __ move(dst_hi, V1); - } - - break; -*/ - /* - case lir_rem: - __ call(Runtime1::entry_for(Runtime1::lrem_stub_id), relocInfo::runtime_call_type); - __ delayed()->nop(); - add_call_info(code_offset(), info); - - if ( dst_lo != V0 ) { - __ move(dst_lo, V0); - } - - if ( dst_hi != V1) { - __ move(dst_hi, V1); - } - - break; - */ + default: ShouldNotReachHere(); } @@ -2902,15 +2880,18 @@ void LIR_Assembler::arith_op(LIR_Code co case lir_add: __ addu(res, lreg, rreg); break; + case lir_mul: __ mult(lreg, rreg); __ nop(); __ nop(); __ mflo(res); break; + case lir_sub: __ subu(res, lreg, rreg); break; + default: ShouldNotReachHere(); } @@ -2976,9 +2957,9 @@ void LIR_Assembler::arith_op(LIR_Code co case lir_div_strictfp: __ div_s(res, lreg, rreg); break; - case lir_rem: - __ rem_s(res, lreg, rreg); - break; +// case lir_rem: +// __ rem_s(res, lreg, rreg); +// break; default : ShouldNotReachHere(); } } else if (left->is_double_fpu()) { @@ -3006,9 +2987,9 @@ void LIR_Assembler::arith_op(LIR_Code co case lir_div_strictfp: __ div_d(res, lreg, rreg); break; - case lir_rem: - __ rem_d(res, lreg, rreg); - break; +// case lir_rem: +// __ rem_d(res, lreg, rreg); +// break; default : ShouldNotReachHere(); } } @@ -3197,39 +3178,74 @@ void LIR_Assembler::logic_op(LIR_Code co // we assume that eax and edx can be overwritten void LIR_Assembler::arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info) { - assert(left->is_single_cpu(), "left must be register"); - assert(right->is_single_cpu() || right->is_constant(), "right must be register or constant"); - assert(result->is_single_cpu(), "result must be register"); - - Register lreg = left->as_register(); - Register dreg = result->as_register(); - - if (right->is_constant()) { - int divisor = right->as_constant_ptr()->as_jint(); - assert(divisor!=0, "must be nonzero"); - __ move(AT, divisor); - __ div(lreg, AT); - __ nop(); - __ nop(); - } else { - Register rreg = right->as_register(); - int idivl_offset = code_offset(); - __ div(lreg, rreg); - __ nop(); - __ nop(); - add_debug_info_for_div0(idivl_offset, info); - } - - // get the result - if (code == lir_irem) { - __ mfhi(dreg); - } else if (code == lir_idiv) { - __ mflo(dreg); - } else { - ShouldNotReachHere(); - } -} - + assert(left->is_single_cpu(), "left must be register"); + assert(right->is_single_cpu() || right->is_constant(), "right must be register or constant"); + assert(result->is_single_cpu(), "result must be register"); + + Register lreg = left->as_register(); + Register dreg = result->as_register(); + + if (right->is_constant()) { + int divisor = right->as_constant_ptr()->as_jint(); + assert(divisor!=0, "must be nonzero"); + __ move(AT, divisor); + __ div(lreg, AT); + __ nop(); + __ nop(); + } else { + Register rreg = right->as_register(); + int idivl_offset = code_offset(); + __ div(lreg, rreg); + __ nop(); + __ nop(); + add_debug_info_for_div0(idivl_offset, info); + } + + // get the result + if (code == lir_irem) { + __ mfhi(dreg); + } else if (code == lir_idiv) { + __ mflo(dreg); + } else { + ShouldNotReachHere(); + } +} + +void LIR_Assembler::arithmetic_frem(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info) { + if (left->is_single_fpu()) { + assert(right->is_single_fpu(),"right must be float"); + assert(result->is_single_fpu(), "dest must be float"); + assert(temp->is_single_fpu(), "dest must be float"); + + FloatRegister lreg = left->as_float_reg(); + FloatRegister rreg = right->as_float_reg(); + FloatRegister res = result->as_float_reg(); + FloatRegister tmp = temp->as_float_reg(); + + switch (code) { + case lir_frem: + __ rem_s(res, lreg, rreg, tmp); + break; + default : ShouldNotReachHere(); + } + } else if (left->is_double_fpu()) { + assert(right->is_double_fpu(),"right must be double"); + assert(result->is_double_fpu(), "dest must be double"); + assert(temp->is_double_fpu(), "dest must be double"); + + FloatRegister lreg = left->as_double_reg(); + FloatRegister rreg = right->as_double_reg(); + FloatRegister res = result->as_double_reg(); + FloatRegister tmp = temp->as_double_reg(); + + switch (code) { + case lir_frem: + __ rem_d(res, lreg, rreg, tmp); + break; + default : ShouldNotReachHere(); + } + } +} void LIR_Assembler::comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst,LIR_Op2 * op) { Register dstreg = dst->as_register(); @@ -3662,7 +3678,6 @@ void LIR_Assembler::shift_op(LIR_Code co Register desthi = dest->as_register_hi(); assert_different_registers(destlo, valuehi, desthi); count = count & 0x3f; - switch (code) { case lir_shl: if (count==0) { @@ -3938,7 +3953,9 @@ void LIR_Assembler::emit_arraycopy(LIR_O __ push(length); - assert_different_registers(A0, A1, length); + assert(A0 != A1 && + A0 != length && + A1 != length, "register checks"); __ move(AT, dst_pos); if (shift_amount > 0 && basic_type != T_OBJECT) { __ sll(A2, length, shift_amount); @@ -3947,6 +3964,10 @@ void LIR_Assembler::emit_arraycopy(LIR_O __ move(A2, length); } __ move(A3, src_pos ); + assert(A0 != dst_pos && + A0 != dst && + dst_pos != dst, "register checks"); + assert_different_registers(A0, dst_pos, dst); __ sll(AT, AT, shift_amount); __ addi(AT, AT, arrayOopDesc::base_offset_in_bytes(basic_type)); diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_LIRGenerator_mips.cpp Thu Oct 28 11:07:44 2010 +0800 @@ -299,14 +299,14 @@ bool LIRGenerator::strength_reduce_multi bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { if (tmp->is_valid()) { if (is_power_of_2(c + 1)) { - __ move(left, tmp); - __ shift_left(left, log2_intptr(c + 1), left); - __ sub(left, tmp, result); + __ move(left, result); + __ shift_left(result, log2_intptr(c + 1), result); + __ sub(result, left, result); return true; } else if (is_power_of_2(c - 1)) { - __ move(left, tmp); - __ shift_left(left, log2_intptr(c - 1), left); - __ add(left, tmp, result); + __ move(left, result); + __ shift_left(result, log2_intptr(c - 1), result); + __ add(result, left, result); return true; } } @@ -454,12 +454,24 @@ void LIRGenerator::do_NegateOp(NegateOp* // for _fadd, _fmul, _fsub, _fdiv, _frem // _dadd, _dmul, _dsub, _ddiv, _drem void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { - LIRItem left(x->x(), this); - LIRItem right(x->y(), this); - left.load_item(); - right.load_item(); - rlock_result(x); - arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp()); + LIR_Opr tmp; + LIRItem left(x->x(), this); + LIRItem right(x->y(), this); + left.load_item(); + right.load_item(); + rlock_result(x); + switch (x->op()) { + case Bytecodes::_drem: + tmp = new_register(T_DOUBLE); + __ frem(left.result(), right.result(), x->operand(), tmp); + + break; + case Bytecodes::_frem: + tmp = new_register(T_FLOAT); + __ frem(left.result(), right.result(), x->operand(), tmp); + break; + default: arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp()); + } } @@ -540,30 +552,30 @@ void LIRGenerator::do_ArithmeticOp_Long( // for: _iadd, _imul, _isub, _idiv, _irem void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { - bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem; - LIRItem left(x->x(), this); - LIRItem right(x->y(), this); - // missing test if instr is commutative and if we should swap - right.load_nonconstant(); - assert(right.is_constant() || right.is_register(), "wrong state of right"); - left.load_item(); - rlock_result(x); - if (is_div_rem) { - CodeEmitInfo* info = state_for(x); - LIR_Opr tmp =new_register(T_INT); - if (x->op() == Bytecodes::_irem) { - __ irem(left.result(), right.result(), x->operand(), tmp, info); - } else if (x->op() == Bytecodes::_idiv) { - __ idiv(left.result(), right.result(), x->operand(), tmp, info); - } - } else { - //arithmetic_op_int(x->op(), x->operand(), left.result(), - //right.result(), FrameMap::G1_opr); + bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem; + LIRItem left(x->x(), this); + LIRItem right(x->y(), this); + // missing test if instr is commutative and if we should swap + right.load_nonconstant(); + assert(right.is_constant() || right.is_register(), "wrong state of right"); + left.load_item(); + rlock_result(x); + if (is_div_rem) { + CodeEmitInfo* info = state_for(x); + LIR_Opr tmp =new_register(T_INT); + if (x->op() == Bytecodes::_irem) { + __ irem(left.result(), right.result(), x->operand(), tmp, info); + } else if (x->op() == Bytecodes::_idiv) { + __ idiv(left.result(), right.result(), x->operand(), tmp, info); + } + } else { + //arithmetic_op_int(x->op(), x->operand(), left.result(), + //right.result(), FrameMap::G1_opr); - LIR_Opr tmp =new_register(T_INT); - arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), - tmp); - } + LIR_Opr tmp =new_register(T_INT); + arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), + tmp); + } } diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/c1_globals_mips.hpp --- a/hotspot/src/cpu/mips/vm/c1_globals_mips.hpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_globals_mips.hpp Thu Oct 28 11:07:44 2010 +0800 @@ -69,7 +69,7 @@ define_pd_global(bool, LIRFillDelaySlots define_pd_global(bool, LIRFillDelaySlots, false); define_pd_global(bool, OptimizeSinglePrecision, true); define_pd_global(bool, CSEArrayLength, false); -define_pd_global(bool, TwoOperandLIRForm, true); +define_pd_global(bool, TwoOperandLIRForm, false); define_pd_global(intx, SafepointPollOffset, 256); diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/cpu/mips/vm/templateTable_mips.cpp --- a/hotspot/src/cpu/mips/vm/templateTable_mips.cpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/templateTable_mips.cpp Thu Oct 28 11:07:44 2010 +0800 @@ -1669,7 +1669,7 @@ void TemplateTable::fop2(Operation op) { __ mfc1(FSR, FSF); __ mtc1(FSR, F12); __ lwc1(FTF, at_sp()); - __ rem_s(FSF, FTF, F12); + __ rem_s(FSF, FTF, F12, FSF); break; default : ShouldNotReachHere(); } @@ -1710,7 +1710,7 @@ void TemplateTable::dop2(Operation op) { __ mtc1(SSR, F13); __ lwc1(FTF, at_sp()); __ lwc1(STF, at_sp_p1()); - __ rem_d(FSF, FTF, F12); + __ rem_d(FSF, FTF, F12, FSF); break; default : ShouldNotReachHere(); } diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/share/vm/c1/c1_LIR.cpp --- a/hotspot/src/share/vm/c1/c1_LIR.cpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/share/vm/c1/c1_LIR.cpp Thu Oct 28 11:07:44 2010 +0800 @@ -735,6 +735,9 @@ void LIR_OpVisitState::visit(LIR_Op* op) // LIR_Op3 +#ifdef MIPS32 + case lir_frem: +#endif case lir_idiv: case lir_irem: { assert(op->as_Op3() != NULL, "must be"); @@ -1250,6 +1253,17 @@ void LIR_List::volatile_store_unsafe_reg } +#ifdef MIPS32 +void LIR_List::frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { + append(new LIR_Op3( + lir_frem, + left, + right, + tmp, + res, + info)); +} +#endif void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op3( @@ -1773,6 +1787,9 @@ const char * LIR_Op::name() const { case lir_ushr: s = "ushift_right"; break; case lir_alloc_array: s = "alloc_array"; break; // LIR_Op3 +#ifdef MIPS32 + case lir_frem: s = "frem"; break; +#endif case lir_idiv: s = "idiv"; break; case lir_irem: s = "irem"; break; // LIR_OpJavaCall diff -r 88ad8d87be77 -r 85b046e5468b hotspot/src/share/vm/c1/c1_LIR.hpp --- a/hotspot/src/share/vm/c1/c1_LIR.hpp Tue Oct 26 20:09:04 2010 +0800 +++ b/hotspot/src/share/vm/c1/c1_LIR.hpp Thu Oct 28 11:07:44 2010 +0800 @@ -872,6 +872,7 @@ enum LIR_Code { , lir_compare_to , end_op2 , begin_op3 + , lir_frem , lir_idiv , lir_irem , end_op3 @@ -2138,6 +2139,9 @@ class LIR_List: public CompilationResour void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F From liuqi at loongson.cn Sat Oct 30 23:26:59 2010 From: liuqi at loongson.cn (LIU Qi) Date: Sun, 31 Oct 2010 14:26:59 +0800 Subject: [liuqi@icedtea.classpath.org: /hg/openjdk6-mips: Fix a bug in FrameMap::nr2floatreg.] Message-ID: <20101031062659.GA4668@loongson.cn> ----- Forwarded message from liuqi at icedtea.classpath.org ----- Date: Sun, 31 Oct 2010 06:19:27 +0000 From: liuqi at icedtea.classpath.org To: distro-pkg-dev at openjdk.java.net Subject: /hg/openjdk6-mips: Fix a bug in FrameMap::nr2floatreg. changeset d2a6a000ff33 in /hg/openjdk6-mips details: http://icedtea.classpath.org/hg/openjdk6-mips?cmd=changeset;node=d2a6a000ff33 author: YANG Yongqiang date: Sat Oct 30 17:47:17 2010 +0800 Fix a bug in FrameMap::nr2floatreg. In FrameMap::nr2floatreg, it is wrong that multiplying 2 to the argument rnr. diffstat: 4 files changed, 30 insertions(+), 92 deletions(-) hotspot/src/cpu/mips/vm/c1_FrameMap_mips.cpp | 2 hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp | 23 ++++--- hotspot/src/cpu/mips/vm/sharedRuntime_mips.cpp | 25 +++----- hotspot/src/cpu/mips/vm/templateTable_mips.cpp | 72 ++---------------------- diffs (256 lines): diff -r 85b046e5468b -r d2a6a000ff33 hotspot/src/cpu/mips/vm/c1_FrameMap_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_FrameMap_mips.cpp Thu Oct 28 11:07:44 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_FrameMap_mips.cpp Sat Oct 30 17:47:17 2010 +0800 @@ -166,7 +166,7 @@ FloatRegister FrameMap::nr2floatreg (int FloatRegister FrameMap::nr2floatreg (int rnr) { assert(_init_done, "tables not initialized"); debug_only(fpu_range_check(rnr);) - return _fpu_regs[rnr*2]; + return _fpu_regs[rnr]; } // returns true if reg could be smashed by a callee. diff -r 85b046e5468b -r d2a6a000ff33 hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp --- a/hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp Thu Oct 28 11:07:44 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/c1_Runtime1_mips.cpp Sat Oct 30 17:47:17 2010 +0800 @@ -323,17 +323,18 @@ static void restore_live_registers(StubA } static void restore_live_registers_except_V0(StubAssembler* sasm, bool restore_fpu_registers = true) { - //static void restore_live_registers(MacroAssembler* sasm) { - //FIXME , maybe V1 need to be saved too - __ block_comment("restore_live_registers except V0"); - for (Register r = T0; r != T7->successor(); r = r->successor() ) { - __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off) * wordSize); - } - for (Register r = S0; r != S7->successor(); r = r->successor() ) { - __ lw(r, SP, (r->encoding() - S0->encoding() + S0_off) * wordSize); - } - __ lw(V1, SP, V1_off * wordSize); - __ addiu(SP, SP, (reg_save_frame_size - 2)* wordSize); + //static void restore_live_registers(MacroAssembler* sasm) { + //FIXME , maybe V1 need to be saved too + __ block_comment("restore_live_registers except V0"); + for (Register r = T0; r != T7->successor(); r = r->successor() ) { + __ lw(r, SP, (r->encoding() - T0->encoding() + T0_off) * wordSize); + } + for (Register r = S0; r != S7->successor(); r = r->successor() ) { + __ lw(r, SP, (r->encoding() - S0->encoding() + S0_off) * wordSize); + } + + __ lw(V1, SP, V1_off * wordSize); + __ addiu(SP, SP, (reg_save_frame_size - 2)* wordSize); } void Runtime1::initialize_pd() { // nothing to do diff -r 85b046e5468b -r d2a6a000ff33 hotspot/src/cpu/mips/vm/sharedRuntime_mips.cpp --- a/hotspot/src/cpu/mips/vm/sharedRuntime_mips.cpp Thu Oct 28 11:07:44 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/sharedRuntime_mips.cpp Sat Oct 30 17:47:17 2010 +0800 @@ -1181,25 +1181,24 @@ int SharedRuntime::c_calling_convention( if(int_reg_cnt == 0){ regs[i].set2(A0->as_VMReg()); int_reg_cnt += 2; - } - else if (int_reg_cnt == 1){ + } else if (int_reg_cnt == 1){ regs[i].set2(A2->as_VMReg()); int_reg_cnt += 3; - }else if(int_reg_cnt == 2){ + } else if (int_reg_cnt == 2){ regs[i].set2(A2->as_VMReg()); int_reg_cnt += 2; - }else if(int_reg_cnt == 3){ + } else if (int_reg_cnt == 3){ regs[i].set2(VMRegImpl::stack2reg(stack)); stack += 2; int_reg_cnt += 1; - }else{ + } else { regs[i].set2(VMRegImpl::stack2reg(stack)); stack += 2; } break; case T_DOUBLE: assert(sig_bt[i+1] == T_VOID, "missing Half" ); - if(f2i==1){ + if(f2i == 1){ if (int_reg_cnt == 1){ regs[i].set2(A2->as_VMReg()); int_reg_cnt += 3; @@ -1214,19 +1213,16 @@ int SharedRuntime::c_calling_convention( regs[i].set2(VMRegImpl::stack2reg(stack)); stack += 2; } - } - else { - if(flt_reg_cnt==0){ + } else { + if(flt_reg_cnt == 0){ regs[i].set2(F12->as_VMReg()); flt_reg_cnt++; int_reg_cnt += 2; - } - else if( flt_reg_cnt==2){ + } else if( flt_reg_cnt == 2){ regs[i].set2(F14->as_VMReg()); flt_reg_cnt++; if(int_reg_cnt<=1)int_reg_cnt += 1; - } - else if(int_reg_cnt == 2){ + } else if(int_reg_cnt == 2){ regs[i].set2(A2->as_VMReg()); int_reg_cnt +=2; }else if(int_reg_cnt == 3){ @@ -1239,7 +1235,6 @@ int SharedRuntime::c_calling_convention( } } - ; break; case T_VOID: regs[i].set_bad(); break; default: @@ -1247,7 +1242,7 @@ int SharedRuntime::c_calling_convention( break; } } - return stack ; + return stack; } int SharedRuntime::c_calling_convention_jni(const BasicType *sig_bt, diff -r 85b046e5468b -r d2a6a000ff33 hotspot/src/cpu/mips/vm/templateTable_mips.cpp --- a/hotspot/src/cpu/mips/vm/templateTable_mips.cpp Thu Oct 28 11:07:44 2010 +0800 +++ b/hotspot/src/cpu/mips/vm/templateTable_mips.cpp Sat Oct 30 17:47:17 2010 +0800 @@ -2779,7 +2779,7 @@ void TemplateTable::resolve_cache_and_in __ get_cache_and_index_at_bcp(Rcache, index, 1); // is resolved? - __ sll(AT, index, 4); + __ sll(AT, index, 4); __ add(AT, Rcache, AT); __ lw(AT, AT, in_bytes(constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset())); @@ -2877,6 +2877,8 @@ void TemplateTable::load_invoke_cp_cache __ sll(AT, index, 4); __ add(AT, cache, AT); __ lw(method, AT, method_offset); + + if (itable_index != NOREG) { //__ sll(AT, index, 4); //__ addu(AT, cache, AT); @@ -3171,7 +3173,7 @@ void TemplateTable::jvmti_post_field_mod // depending on its type. As a result, we must find // the type to determine where the object is. Label two_word, valsize_known; - __ sll(AT, T4, 4); + __ sll(AT, T4, 4); __ add(AT, T1, AT); __ lw(T3, AT, in_bytes(cp_base_offset + ConstantPoolCacheEntry::flags_offset())); @@ -3201,7 +3203,7 @@ void TemplateTable::jvmti_post_field_mod } // cache entry pointer __ addi(T1, T1, in_bytes(cp_base_offset)); - __ shl(T4, 4); + __ shl(T4, 4); __ addu(T1, T1, T4); // object (tos) __ move(T3, SP); @@ -3564,7 +3566,7 @@ void TemplateTable::fast_storefield(TosS __ get_cache_and_index_at_bcp(T3, T2, 1); // test for volatile with edx but edx is tos register for lputfield. - __ sll(AT, T2, 4); + __ sll(AT, T2, 4); __ add(AT, T3, AT); __ lw(T4, AT, in_bytes(base + ConstantPoolCacheEntry::flags_offset())); @@ -3941,15 +3943,10 @@ void TemplateTable::invokevirtual_helper __ verify_oop(method); // It's final, need a null check here! -//jerome_for_debug __ null_check(recv); // profile this call __ profile_final_call(T0); - - //__ lw(T9, method, in_bytes(methodOopDesc::interpreter_entry_offset())); - //__ jr(T9); - //__ delayed(); __ move(T0, recv); __ jump_from_interpreted(method, T4); @@ -3960,55 +3957,6 @@ void TemplateTable::invokevirtual_helper // Keep recv in ecx for callee expects it there __ lw(T4, recv, oopDesc::klass_offset_in_bytes()); __ verify_oop(T4); -//jerome10 -/* - Label nnn; - __ move(AT, 0x80000000); - __ andr(AT, AT, T4); - __ beq(AT, ZERO, nnn); - __ delayed()->nop(); - - __ move(AT, (int)&jerome10 ); - __ sw(ZERO, AT, 0); - - __ move(AT, (int)&jerome1 ); - __ sw(recv, AT, 0); - __ move(AT, (int)&jerome2 ); - __ sw(T4, AT, 0); - __ move(AT, (int)&jerome3 ); -// __ get_thread(T4); - __ sw(RA, AT, 0); - __ move(AT, (int)&jerome4 ); - __ sw(SP, AT, 0); - - __ move(AT, (int)&jerome5 ); - __ sw(FP, AT, 0); - - __ move(AT, (int)&jerome6 ); - __ sw(ZERO, AT, 0); - - __ move(AT, (int)&jerome7 ); - __ sw(ZERO, AT, 0); - - __ move(AT, (int)&jerome8 ); - __ sw(ZERO, AT, 0); - - __ move(AT, (int)&jerome9 ); - __ sw(ZERO, AT, 0); -// __ move(AT, (int)&jerome2 ); -// __ lw(T4, AT, 0); - - __ pushad(); -// __ enter(); - __ call(CAST_FROM_FN_PTR(address, SharedRuntime::print_call_statistics), - relocInfo::runtime_call_type); - __ delayed()->nop(); -// __ leave(); - __ popad(); - - - __ bind(nnn); -*/ // profile this call __ profile_virtual_call(T1, T0, T4); @@ -4017,14 +3965,8 @@ void TemplateTable::invokevirtual_helper assert(vtableEntry::size() * wordSize == 4, "adjust the scaling in the code below"); __ sll(AT, index, 2); __ add(AT, T4, AT); - //this is a ualign read - __ lw(method,AT,base+vtableEntry::method_offset_in_bytes()); - -// __ lhu(method, AT, base+vtableEntry::method_offset_in_bytes()+2); - // __ lhu(T4, AT, base+vtableEntry::method_offset_in_bytes()); - // __ sll(method, method, 16); - // __ addu(method, method, T4); + __ lw(method, AT, base + vtableEntry::method_offset_in_bytes()); __ move(T0, recv); __ jump_from_interpreted(method, T4); ----- End forwarded message ----- -- LIU Qi liuqi at loongson.cn liuqi82 at gmail.com Loongson Technology Co. Ltd. PGP Key fingerprint: 3D29 FDFD AFB3 225D B744 7FAB 51C7 4820 63BA 272F