[vector] Fix test failure with UseAVX=0 and UseAVX=1
Vladimir Ivanov
vladimir.x.ivanov at oracle.com
Sat May 19 00:53:55 UTC 2018
Thanks for the clarifications, Razvan. Looks good!
Best regards,
Vladimir Ivanov
On 5/18/18 13:22, Lupusoru, Razvan A wrote:
> Thanks for taking a look at the fixes.
>
> - The signature change to separate mask from xmm0 was needed because I have found that register allocator did not adhere to requests to allocate the mask in xmm0. Namely, what would happen is that mask generator (in my failed case it was a VectorLoadMask) would assign a vecD as output. Then match rule for blend would fail because constraint for mask to be in xmm0 did not get met. The only way I have found that can fix this is to explicitly ask for a temp as xmm0 and use that instead for blend.
> - You are probably right that the "if" condition is unnecessary since it is incorrect to allocate temp in same register as source. I can fix that in a follow up patch.
> - Regarding masks, I have found that when using UseAVX=1, there were failures. The root cause was that vector_size_supported will return false for 256 when element type is integral type. This is because AVX only supports 256-bit operations for FP. Thus there were inconsistencies for vector_size_supported when mask is integral type while user is FP type. Thus I got rid of the erasure and now masks reflect the appropriate element type (not just the integral type corresponding to appropriate bits).
>
> Let me know if you have any more questions.
>
> --Razvan
>
> -----Original Message-----
> From: Vladimir Ivanov [mailto:vladimir.x.ivanov at oracle.com]
> Sent: Friday, May 18, 2018 1:09 PM
> To: Lupusoru, Razvan A <razvan.a.lupusoru at intel.com>; panama-dev at openjdk.java.net
> Subject: Re: [vector] Fix test failure with UseAVX=0 and UseAVX=1
>
> Razvan, can you elaborate why you
>
> src/hotspot/cpu/x86/x86.ad:
>
> -instruct pblendvb1L(vecD dst, vecD src, rxmm0 mask) %{
> +instruct pblendvb1L(vecD dst, vecD src, vecD mask, rxmm0 xmm_0) %{
> predicate(UseAVX == 0 && UseSSE > 3 && n->as_Vector()->length() == 1 && n->bottom_type()->is_vect()->element_basic_type() == T_LONG);
> match(Set dst (VectorBlend (Binary dst src) mask));
> + effect(TEMP xmm_0);
> format %{ "pblendvb $dst,$src,$mask\t! blend packed1L" %}
> ins_encode %{
> + if ($mask$$XMMRegister != $xmm_0$$XMMRegister) {
> + __ movdqu($xmm_0$$XMMRegister, $mask$$XMMRegister);
> + }
> __ pblendvb($dst$$XMMRegister, $src$$XMMRegister);
> %}
> ins_pipe( pipe_slow );
> %}
>
> "$mask$$XMMRegister != $xmm_0$$XMMRegister" check looks redundant.
> Is it possible for input & temp to be assigned the same register?
>
>
> Also, can you, please, elaborate why you remove basic type erasure for masks? Is it because you adjusted ad rules to cover T_FLOAT & T_DOUBLE as well?
>
> -instruct pblendvb16B(vecX dst, vecX src, rxmm0 mask) %{
> +instruct pblendvb16B(vecX dst, vecX src, vecX mask, rxmm0 xmm_0) %{
>
> -instruct pblendvb2L(vecX dst, vecX src, rxmm0 mask) %{
> +instruct pblendvb2L(vecX dst, vecX src, vecX mask, rxmm0 xmm_0) %{
>
> -instruct blendvpd2D(vecX dst, vecX src, rxmm0 mask) %{
> +instruct blendvpd2D(vecX dst, vecX src, vecX mask, rxmm0 xmm_0) %{
>
> instruct loadmask4i(vecX dst, vecS src) %{
> - predicate(UseSSE >= 4 && n->as_Vector()->length() == 4 &&
> n->bottom_type()->is_vect()->element_basic_type() == T_INT);
> + predicate(UseSSE >= 4 && n->as_Vector()->length() == 4 &&
> + (n->bottom_type()->is_vect()->element_basic_type() == T_INT ||
> + n->bottom_type()->is_vect()->element_basic_type() ==
> T_FLOAT));
>
> Best regards,
> Vladimir Ivanov
>
> On 5/18/18 12:28, Lupusoru, Razvan A wrote:
>> Hi all,
>>
>> The following patch fixes test failures when running tests with UseAVX=0 and UseAVX=1. Let me know if you have any comments. Thanks!
>> http://cr.openjdk.java.net/~rlupusoru/panama/webrev_fixuseavx_01/index.html
>>
>> --Razvan
>>
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