[vector] Support long addAll() for AVX < 3
Viswanathan, Sandhya
sandhya.viswanathan at intel.com
Mon Jan 21 23:29:43 UTC 2019
Please find the updated patch at:
http://cr.openjdk.java.net/~sviswanathan/vectorIntrinsics/longAddReduction/webrev.01/
Changes vs previous patch:
1) instruct rvadd2L_reduction_reg: Remove predicate(UseSSE >= 2) as SSE2 is a requirement for LP64.
2) instruct rvadd4L_reduction_reg: The predicate should be UseAVX > 1.
Best Regards,
Sandhya
-----Original Message-----
From: Vladimir Ivanov [mailto:vladimir.x.ivanov at oracle.com]
Sent: Monday, January 21, 2019 1:58 PM
To: Viswanathan, Sandhya <sandhya.viswanathan at intel.com>; panama-dev at openjdk.java.net
Subject: Re: [vector] Support long addAll() for AVX < 3
>>> BTW it would be nice to move 64-bit specific declarations into x86_64.ad.
> The base rules for AddReductionVL are coming from mainline and it has been under LP64 check. Also there are many instances of LP64 check in x86.ad file as traditionally x86.ad held all the vectorization related rules. May be that needs to be a separate refactor at some point starting from mainline JDK. Please let me know what you think and I will send an updated webrev accordingly.
Sure, I'm perfectly fine with addressing it separately.
Best regards,
Vladimir Ivanov
> -----Original Message-----
> From: Vladimir Ivanov [mailto:vladimir.x.ivanov at oracle.com]
> Sent: Monday, January 21, 2019 11:44 AM
> To: Viswanathan, Sandhya <sandhya.viswanathan at intel.com>; panama-dev at openjdk.java.net
> Subject: Re: [vector] Support long addAll() for AVX < 3
>
> src/hotspot/cpu/x86/x86.ad:
> #ifdef _LP64
> instruct rvadd2L_reduction_reg(rRegL dst, rRegL src1, vecX src2, vecX tmp, vecX tmp2) %{
> - predicate(UseAVX > 2);
> + predicate(UseSSE >= 2);
>
> There's no need in the check, since SSE2 support is a requirement on x64.
>
> BTW it would be nice to move 64-bit specific declarations into x86_64.ad.
>
>
> instruct rvadd4L_reduction_reg(rRegL dst, rRegL src1, vecY src2, vecY
> tmp, vecY tmp2) %{
> - predicate(UseAVX > 2);
> + predicate(UseAVX >= 1);
>
> Are you sure about AVX1 support? As I see in the docs, 256-bit pshufd
> variant is available since AVX2.
>
> (On a side note, I'm in favor of exclusive range checks: UseAVX > 1 vs
> UseAVX >= 2. The former reads better in x86.ad.)
>
> Best regards,
> Vladimir Ivanov
>
> On 21/01/2019 11:32, Viswanathan, Sandhya wrote:
>> Hi All,
>>
>> Please find below a small patch supporting long addAll for AVX < 3:
>>
>> http://cr.openjdk.java.net/~sviswanathan/vectorIntrinsics/longAddReduction/webrev.00/
>>
>> Best Regards,
>> Sandhya
>>
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