[vectorIntrinsics] RFR: 8265321: Add Rearrange nodes implementation for Arm SVE

[Wang Huang]

On Thu, 22 Apr 2021 02:13:16 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/aarch64_sve.ad line 232:
>> 
>>> 230:       case Op_StoreVectorScatter:
>>> 231:       case Op_VectorLoadConst:
>>> 232:       case Op_VectorRearrange:
>> 
>> The min vector length for `VectorRearrange/VecorLoadShuffle` is 4, which decides the min vector length for byte is 4. However, currently it doesn't have such size limitation for SVE. This makes the` rearrange` tests of `Double128VectorTests/Long128VectorTests ` crash when the compiler tries to make the byte vector type with length 2. Could you please fix this issue together with this patch? Thanks so much!
>
> I think you can simply fix as what NEON does, like:
> 
>       case Op_VectorLoadShuffle:
>       case Op_VectorRearrange:
>         if (vlen < 4) {
>           return false;
>         }
> 
> When we have all codegen ready, I will create another patch to fine-tune the supported vector size for each Op to get best performance.

Yes, I have fixed in this form and tested. I think that full-test will be completed soon.

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PR: https://git.openjdk.java.net/panama-vector/pull/70