[vectorIntrinsics] RFR: 8271005: AArch64: Add SVE codegen for VectorMask reduction nodes

[Xiaohong Gong]

On Fri, 23 Jul 2021 03:19:29 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

>> This patch adds the SVE backend implementation for the following VectorMask reduction nodes:
>> 
>>  - VectorMaskTrueCountNode
>>  - VectorMaskFirstTrueNode
>>  - VectorMaskLastTrueNode
>> 
>> It also adds the optimized rules when the mask inputs of these nodes are kind of `"StoreVectorMaskNode"`, which can optimize out the needless codegen for` "StoreVectorMaskNode"`.
>> 
>> Also change defined temp governing predicate registers to all valid predicate registers for some rules.
>> 
>> Note that this is the SVE vector implementation version that the VectorMask is represented like the normal vector while not the predicate.
>
> Marked as reviewed by njian (Committer).

Thanks for the review @nsjian @theRealELiu !

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PR: https://git.openjdk.java.net/panama-vector/pull/100