[vectorIntrinsics] Integrated: 8271005: AArch64: Add SVE codegen for VectorMask reduction nodes

[Xiaohong Gong]

On Thu, 22 Jul 2021 10:19:35 GMT, Xiaohong Gong <xgong at openjdk.org> wrote:

> This patch adds the SVE backend implementation for the following VectorMask reduction nodes:
> 
>  - VectorMaskTrueCountNode
>  - VectorMaskFirstTrueNode
>  - VectorMaskLastTrueNode
> 
> It also adds the optimized rules when the mask inputs of these nodes are kind of `"StoreVectorMaskNode"`, which can optimize out the needless codegen for` "StoreVectorMaskNode"`.
> 
> Also change defined temp governing predicate registers to all valid predicate registers for some rules.
> 
> Note that this is the SVE vector implementation version that the VectorMask is represented like the normal vector while not the predicate.

This pull request has now been integrated.

Changeset: 4839fdf6
Author:    Xiaohong Gong <xgong at openjdk.org>
URL:       https://git.openjdk.java.net/panama-vector/commit/4839fdf6a3f27467447edc46326bc874d8a7404f
Stats:     475 lines in 7 files changed: 360 ins; 18 del; 97 mod

8271005: AArch64: Add SVE codegen for VectorMask reduction nodes

Reviewed-by: njian, eliu

-------------

PR: https://git.openjdk.java.net/panama-vector/pull/100