[vectorIntrinsics] RFR: RFC: Vector API masking support proposal for Arm SVE

[Xiaohong Gong]

On Tue, 16 Mar 2021 04:12:00 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

>>> I don't quite understand this inconsistency. Could you please elaborate a bit more? I am expecting a mask generating node would always get a TypeVMask (TypeVectMask) on supporting platform, which is pRegGovOper on SVE.
>> 
>> Hi @nsjian ,
>> This question was related to SVE support,
>> Function vRegOper::type() always returns Type::VECA.
>> Type::VECA is initialized as maximal sized Scalable vector i.e. its size should be 2048 bit.  For a MachTypeNode having vReg as its def operand, will the def operand's type always match the bottom_type() of MachTypeNode?
>
> Hi @jatin-bhateja ,
> 
>> Type::VECA is initialized as maximal sized Scalable vector i.e. its size should be 2048 bit. For a MachTypeNode having vReg as its def operand, will the def operand's type always match the bottom_type() of MachTypeNode?
> 
> Yes, I think so. On SVE target, we have only one vector type, TypeVect::VECTA and no other vector types. And it's real size is runtime detected, based on hardware implementation.
> 
> Thanks,
> Ningsheng

Hi, I added the predicate support for API `maskAll` and also removed the redundant `negations`. Thanks!

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PR: https://git.openjdk.java.net/panama-vector/pull/40