[vectorIntrinsics] RFR: 8285281: [x86] Add C2 mid-end and back-end implementation for COMPRESS_BITS and EXPAND_BITS operations [v2]

[Eric Liu]

On Sun, 24 Apr 2022 04:16:29 GMT, Xiaohong Gong <xgong at openjdk.org> wrote:

>> src/hotspot/share/opto/intrinsicnode.cpp line 171:
>> 
>>> 169:     // compress(x, -1) == x
>>> 170:     if(phase->type(n->in(2))->higher_equal( TypeLong::MINUS_1)) return n->in(1);
>>> 171:   }
>> 
>> The codes are almost the same for int and long type except for the "ZERO and MINUS_1" node. Could you please remove the duplicate codes by just defining different `ZERO` and `MUNUS_1` nodes for int and long?
>
> One more style issue: `higher_equal( TypeLong::MINUS_1)  -> higher_equal(TypeLong::MINUS_1)`

TypeInteger can work. https://github.com/openjdk/jdk/blob/master/src/hotspot/share/opto/type.cpp#L1416

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PR: https://git.openjdk.java.net/panama-vector/pull/195