[vectorIntrinsics] RFR: 8283413: Add C2 mid-end and x86 back-end implementation for bit REVERSE operation [v2]
Quan Anh Mai
duke at openjdk.java.net
Tue Mar 22 17:32:59 UTC 2022
On Tue, 22 Mar 2022 10:04:58 GMT, Quan Anh Mai <duke at openjdk.java.net> wrote:
>> Jatin Bhateja has updated the pull request incrementally with one additional commit since the last revision:
>>
>> 8283413: Adding Ideal transform for (ReverseV (ReverseV VEC)) => VEC and (ReverseV (ReverseV VEC MASK) MASK)) => VEC
>
> src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp line 4498:
>
>> 4496: #endif
>> 4497:
>> 4498: void C2_MacroAssembler::vector_reverse_byte_avx(BasicType bt, XMMRegister dst, XMMRegister src,
>
> Since this is an in-lane shuffle, can we just use `vpshufb` for this?
> Thanks.
We are doing an element-wise byte reverse not a whole vector byte reverse I think we don't need any cross-lane shuffle here.
Thanks.
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PR: https://git.openjdk.java.net/panama-vector/pull/182
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