Removing redundant addis's

[Bruno Alexandre Rosa]

Hello, everyone,

I've been taking a look at some performance optmization opportunities in the
ppc64-specific HotSpot code and stumbled upon some oddities in the jitted code
like:

addis r20, r20, 0

I went ahead and modified the Assembler not to emit an addis when the operands
are the same and the offset is 0.

I tried adding similar conditions on every "__ addis" call on ppc.ad, but
thought this kind of solution is inelegant and harder to maintain. Then I went
for a simpler solution.

Here is the diff:

diff -r b89f80ea707c src/cpu/ppc/vm/assembler_ppc.inline.hpp
--- a/src/cpu/ppc/vm/assembler_ppc.inline.hpp   Fri Oct 07 16:58:57 2016 -0300
+++ b/src/cpu/ppc/vm/assembler_ppc.inline.hpp   Fri Oct 07 19:36:17 2016 -0300
@@ -82,7 +82,7 @@

// PPC 1, section 3.3.8, Fixed-Point Arithmetic Instructions
inline void Assembler::addi(   Register d, Register a, int si16)   { assert(a != R0, "r0 not allowed"); addi_r0ok( d, a, si16); }
-inline void Assembler::addis(  Register d, Register a, int si16)   { assert(a != R0, "r0 not allowed"); addis_r0ok(d, a, si16); }
+inline void Assembler::addis(  Register d, Register a, int si16)   { assert(a != R0, "r0 not allowed"); if (d != a || si16 != 0) addis_r0ok(d, a, si16); }
inline void Assembler::addi_r0ok(Register d,Register a,int si16)   { emit_int32(ADDI_OPCODE   | rt(d) | ra(a) | simm(si16, 16)); }
inline void Assembler::addis_r0ok(Register d,Register a,int si16)  { emit_int32(ADDIS_OPCODE  | rt(d) | ra(a) | simm(si16, 16)); }
inline void Assembler::addic_( Register d, Register a, int si16)   { emit_int32(ADDIC__OPCODE | rt(d) | ra(a) | simm(si16, 16)); }
 However, I'm concerned this modification might be too intrusive. So I came here
to ask opinions on that.
 Regards,
Bruno Rosa
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.openjdk.java.net/pipermail/ppc-aix-port-dev/attachments/20161007/5c1b306d/attachment.html>