[10] RFR(S): 8185969: PPC64: Improve VSR support to use up to 64 registers

[Gustavo Romero]

Hi Gustavo, Martin

On 09-08-2017 09:58, Doerr, Martin wrote:
> seems like you're preparing new VSR code :-)

Regarding the mtvrd substitution proposed by this change, I think that the prior
form for mtvrd is the correct one. mtvrd is an extended mnemonic for mtvsrd and
mtvrd only accepts a Vector/VMX/Altivec operand, in the range from 0 to 31. On
the other hand, mtvsrd accepts a Vector-Scalar/VSX operand, from 0 to 63, where
VSR32-63 are mapped to VR31-63, and likewise for mfvrd/mfvsrd. Also not setting
the bit 31 on instruction (TX=1) and calling the instruction "mtvrd" seems
incorrect.

So I'm wondering if it would be better to keep the prior form of mtvrd/mfvrd and
add support for the mtvsrd and mfvsrd to access to the full range of VSR
registers.


Regards,
Gustavo