Fw: RFR(M):8188139:PPC64: Superword Level Parallelization with VSX
Michihiro Horie
HORIE at jp.ibm.com
Wed Oct 4 02:27:26 UTC 2017
Dear all,
I forward the mail exchanges with Martin to ppc-aix-port-dev.
As I noted below, a latest webrev is following.
http://cr.openjdk.java.net/~mhorie/8188139/webrev.04/
Best regards,
--
Michihiro,
IBM Research - Tokyo
----- Forwarded by Michihiro Horie/Japan/IBM on 2017/10/04 11:23 -----
From: Michihiro Horie/Japan/IBM
To: martin.doerr at sap.com
Cc: hotspot-dev at openjdk.java.net
Date: 2017/10/03 22:12
Subject: RE: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
I noticed that vsra() etc. fill 1u in higher bits, sorry.
http://cr.openjdk.java.net/~mhorie/8188139/webrev.04/
Best regards,
--
Michihiro,
IBM Research - Tokyo
----- Original message -----
From: Michihiro Horie/Japan/IBM
To: "Doerr, Martin" <martin.doerr at sap.com>
Cc: "hotspot-dev at openjdk.java.net" <hotspot-dev at openjdk.java.net>
Subject: RE: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
Date: Tue, Oct 3, 2017 9:27 PM
Hi Martin,
Thank you very much for your further important comments. I understand
VSR52-63 should not be used for now.
Fixed webrev is:
http://cr.openjdk.java.net/~mhorie/8188139/webrev.03/
Best regards,
--
Michihiro,
IBM Research - Tokyo
"Doerr, Martin" ---2017/10/03 00:24:21---Hi Michihiro, I think it was ok
to list all VSR0-63 under Vector-Scalar Registers. Only the vectorx_
From: "Doerr, Martin" <martin.doerr at sap.com>
To: Michihiro Horie <HORIE at jp.ibm.com>
Cc: "hotspot-dev at openjdk.java.net" <hotspot-dev at openjdk.java.net>
Date: 2017/10/03 00:24
Subject: RE: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
Hi Michihiro,
I think it was ok to list all VSR0-63 under Vector-Scalar Registers. Only
the vectorx_reg needs to be limited to the usable ones. (Comment should be
fixed.)
Unfortunately, the ABI specifies VR20-31 which map to VSR52-63 as
nonvolatile. They could be used by the C code, but are not getting saved
and restored. I guess it’s unlikely that there will be anything useful in
these registers, but you never know what (future) compilers will do.
Best regards,
Martin
From: Michihiro Horie [mailto:HORIE at jp.ibm.com]
Sent: Montag, 2. Oktober 2017 16:58
To: Doerr, Martin <martin.doerr at sap.com>
Cc: hotspot-dev at openjdk.java.net
Subject: RE: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
Hi Martin,
>the floating point registers are mapped into VSR0-31. Hence, you can’t
use them for allocation in vectorx_reg.
Thank you very much for your helpful comments. This is one of the points I
did not understand on how to handle VSR even though there are duplication
with FPR. I understand there is no trick and I need to use only VSR32-63
in this case.
Updated webrev is :
http://cr.openjdk.java.net/~mhorie/8188139/webrev.02/
Best regards,
--
Michihiro,
IBM Research - Tokyo
Inactive hide details for "Doerr, Martin" ---2017/10/02 18:47:45---Hi
Michihiro, the floating point registers are mapped into V"Doerr, Martin"
---2017/10/02 18:47:45---Hi Michihiro, the floating point registers are
mapped into VSR0-31. Hence, you can't use them for al
From: "Doerr, Martin" <martin.doerr at sap.com>
To: Michihiro Horie <HORIE at jp.ibm.com>
Cc: "hotspot-dev at openjdk.java.net" <hotspot-dev at openjdk.java.net>
Date: 2017/10/02 18:47
Subject: RE: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
Hi Michihiro,
the floating point registers are mapped into VSR0-31. Hence, you can’t use
them for allocation in vectorx_reg.
Or how do you prevent the FP registers from getting killed?
Best regards,
Martin
From: ppc-aix-port-dev [mailto:ppc-aix-port-dev-bounces at openjdk.java.net]
On Behalf Of Michihiro Horie
Sent: Samstag, 30. September 2017 17:22
To: Vladimir Kozlov <vladimir.kozlov at oracle.com>
Cc: Simonis, Volker <volker.simonis at sap.com>;
ppc-aix-port-dev at openjdk.java.net; hotspot-dev at openjdk.java.net
Subject: Re: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
Vladimir, Gustavo,
Thanks a lot for your comments. I updated the webrev:
http://cr.openjdk.java.net/~mhorie/8188139/webrev.01/
Best regards,
--
Michihiro,
IBM Research - Tokyo
Inactive hide details for Vladimir Kozlov ---2017/09/30 06:40:45---I am
fine with it for these changes. Thanks,Vladimir Kozlov ---2017/09/30
06:40:45---I am fine with it for these changes. Thanks,
From: Vladimir Kozlov <vladimir.kozlov at oracle.com>
To: Gustavo Romero <gromero at linux.vnet.ibm.com>,
hotspot-dev at openjdk.java.net
Cc: Michihiro Horie <HORIE at jp.ibm.com>, ppc-aix-port-dev at openjdk.java.net,
"Simonis, Volker" <volker.simonis at sap.com>
Date: 2017/09/30 06:40
Subject: Re: RFR(M):8188139:PPC64: Superword Level Parallelization with
VSX
I am fine with it for these changes.
Thanks,
Vladimir
On 9/29/17 12:19 PM, Gustavo Romero wrote:
> Hi Vladimir,
>
> On 29-09-2017 16:00, Vladimir Kozlov wrote:
>> I looked on shared code. One comment - change in opto/type.cpp affects
s390.
>
> Do you strongly oppose to split PPC64 and s390 like?
>
> diff -r e93ed1a09240 src/share/vm/opto/type.cpp
> --- a/src/share/vm/opto/type.cpp Tue Aug 08 22:57:34 2017 +0000
> +++ b/src/share/vm/opto/type.cpp Fri Sep 29 15:17:17 2017 -0400
> @@ -67,7 +67,13 @@
> { Bad, T_ILLEGAL, "vectorx:", false, 0, relocInfo::none }, // VectorX
> { Bad, T_ILLEGAL, "vectory:", false, 0, relocInfo::none }, // VectorY
> { Bad, T_ILLEGAL, "vectorz:", false, 0, relocInfo::none }, // VectorZ
> -#elif defined(PPC64) || defined(S390)
> +#elif defined(PPC64)
> + { Bad, T_ILLEGAL, "vectors:", false, 0, relocInfo::none }, // VectorS
> + { Bad, T_ILLEGAL, "vectord:", false, Op_RegL, relocInfo::none }, //
VectorD
> + { Bad, T_ILLEGAL, "vectorx:", false, Op_VecX, relocInfo::none }, //
VectorX
> + { Bad, T_ILLEGAL, "vectory:", false, 0, relocInfo::none }, // VectorY
> + { Bad, T_ILLEGAL, "vectorz:", false, 0, relocInfo::none }, // VectorZ
> +#elif defined(S390)
> { Bad, T_ILLEGAL, "vectors:", false, 0, relocInfo::none }, // VectorS
> { Bad, T_ILLEGAL, "vectord:", false, Op_RegL, relocInfo::none }, //
VectorD
> { Bad, T_ILLEGAL, "vectorx:", false, 0, relocInfo::none }, // VectorX
>
>
> Kind regards,
> Gustavo
>
>> Vladimir
>>
>> On 9/29/17 2:37 AM, Michihiro Horie wrote:
>>> Dear all,
>>>
>>> Would you please review the following change?
>>> Bug:
https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.openjdk.java.net_browse_JDK-2D8188139&d=DwIC-g&c=jf_iaSHvJObTbx-siA1ZOg&r=oecsIpYF-cifqq2i1JEH0Q&m=f45RKcOIfNDPttql5guPrieuHRGN_sCnNpTyDhdJQ5Q&s=8qV6XGFLseFXm282dspqVrhPluKMgjJ1JVqnM92Ttt4&e=
>>> Webrev:
https://urldefense.proofpoint.com/v2/url?u=http-3A__cr.openjdk.java.net_-7Emhorie_8188139_webrev.00_&d=DwIC-g&c=jf_iaSHvJObTbx-siA1ZOg&r=oecsIpYF-cifqq2i1JEH0Q&m=f45RKcOIfNDPttql5guPrieuHRGN_sCnNpTyDhdJQ5Q&s=hwk_4PJ5tU211eAdQ9txxjx_5WM9b6q4QXaZvsU98yI&e=
>>>
>>> This change introduces to use VSX for Superword Level Parallelization,
concretely VSX instructions are emitted for Replicate[BSIFDL] nodes in
ppc.ad.
>>> Since I am not familiar with the hotspot's register allocation and the
TOC use in POWER, I would be very grateful to have any comments to improve
the change.
>>>
>>> In addition, the change includes some minor fixes in
assembler_ppc.inline.hpp. I think there are some instructions that should
have 1u in higher bits.
>>>
>>>
>>> I used the attached micro benchmark.
>>> /(See attached file: ArraysFillTest.java)/
>>>
>>> Best regards,
>>> --
>>> Michihiro,
>>> IBM Research - Tokyo
>>>
>>
>
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