RFR(S): 8212481: PPC64: Enable POWER9 CPU detection

Gustavo Romero gromero at linux.vnet.ibm.com
Tue Oct 16 21:09:45 UTC 2018


Hi,

Could the following small change be reviewed please?

Bug   : https://bugs.openjdk.java.net/browse/JDK-8212481
Webrev: http://cr.openjdk.java.net/~gromero/8212481/v1/

It adds 'darn' instruction introduced with POWER9 CPUs to the Macroassembler and
uses it to set PowerArchitecturePPC64 to POWER9 when the instruction is
available on the CPU so it can be used in the future by any POWER9-specific
JVM code or by any JVM code specifically dependent on the 'darn' instruction,
using VM_Version::has_darn().

It was checked on POWER9 as the following:

gromero at ltc-wspoon3:~/POWER9/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ lscpu
Architecture:        ppc64le
Byte Order:          Little Endian
CPU(s):              176
On-line CPU(s) list: 0-175
Thread(s) per core:  4
Core(s) per socket:  22
Socket(s):           2
NUMA node(s):        8
Model:               2.2 (pvr 004e 1202)
Model name:          POWER9 (raw), altivec supported
CPU max MHz:         2800.0000
CPU min MHz:         2300.0000
L1d cache:           32K
L1i cache:           32K
L2 cache:            512K
L3 cache:            10240K
NUMA node0 CPU(s):   0-87
NUMA node8 CPU(s):   88-175
NUMA node250 CPU(s):
NUMA node251 CPU(s):
NUMA node252 CPU(s):
NUMA node253 CPU(s):
NUMA node254 CPU(s):
NUMA node255 CPU(s):
gromero at ltc-wspoon3:~/POWER9/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ LD_SHOW_AUXV=1 /bin/true | egrep "HWCAP|PLATFORM"
AT_HWCAP:        true_le archpmu vsx arch_2_06 dfp ic_snoop smt mmu fpu altivec ppc64 ppc32
AT_HWCAP2:       darn ieee128 arch_3_00 vcrypto tar isel ebb dscr arch_2_07
AT_PLATFORM:     power9
AT_BASE_PLATFORM:power9
gromero at ltc-wspoon3:~/POWER9/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ ./java -XX:+Verbose -version
dscr value was 0x10
Version: ppc64 fsqrt isel lxarxeh cmpb popcntb popcntw fcfids vand lqarx aes vpmsumb mfdscr vsx ldbrx stdbrx sha darn L1_data_cache_line_size=128

openjdk version "12-internal" 2019-03-19
OpenJDK Runtime Environment (fastdebug build 12-internal+0-f53671e05660.dirty.debug.POWER9)
OpenJDK 64-Bit Server VM (fastdebug build 12-internal+0-f53671e05660.dirty.debug.POWER9, mixed mode, sharing)


It was also checked on POWER8 and no regression was observed:

gromero at gromero16:~/openjdks/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ lscpu
Architecture:          ppc64le
Byte Order:            Little Endian
CPU(s):                80
On-line CPU(s) list:   0-79
Thread(s) per core:    8
Core(s) per socket:    10
Socket(s):             1
NUMA node(s):          1
Model:                 2.1 (pvr 004b 0201)
Model name:            POWER8 (architected), altivec supported
Hypervisor vendor:     horizontal
Virtualization type:   full
L1d cache:             64K
L1i cache:             32K
NUMA node0 CPU(s):     0-79
gromero at gromero16:~/openjdks/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ LD_SHOW_AUXV=1 /bin/true | egrep "HWCAP|PLATFORM"
AT_HWCAP:        archpmu vsx arch_2_06 dfp ic_snoop smt mmu fpu altivec ppc64 ppc32
AT_HWCAP2:       htm-nosc vcrypto tar isel ebb dscr htm arch_2_07
AT_PLATFORM:     power8
AT_BASE_PLATFORM:power8
gromero at gromero16:~/openjdks/jdk12_tip_f53671e05660+/jvm/openjdk-12-internal/bin$ ./java -XX:+Verbose -version
dscr value was 0x0
Version: ppc64 fsqrt isel lxarxeh cmpb popcntb popcntw fcfids vand lqarx aes vpmsumb mfdscr vsx ldbrx stdbrx sha rtm L1_data_cache_line_size=128

openjdk version "12-internal" 2019-03-19
OpenJDK Runtime Environment (fastdebug build 12-internal+0-f53671e05660.dirty.debug.POWER9)
OpenJDK 64-Bit Server VM (fastdebug build 12-internal+0-f53671e05660.dirty.debug.POWER9, mixed mode, sharing)


Thank you.

Best regards,
Gustavo



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