[riscv-port] RFR: 8278322: riscv: Support RVC: compressed instructions

[Xiaolin Zheng]

On Thu, 9 Dec 2021 11:47:51 GMT, Fei Yang <fyang at openjdk.org> wrote:

> > Thank you for your explanation, Felix. :-) Seems we finally reach a consensus now.
> > > I guess maybe the best places to do this would be C1 and C2.
> >
> >
> > I think I could get your meaning this time.
> > > I think we can then further consider the "CompressibleRegion" solution suggested by Yadong.
> >
> >
> > Yadong's plan works for me. I am quite in favor of his strategy.
>
> I am happy that we are agreed on this solution ;-) We need to be safe at this very early stage, so I would suggest UseRVC disabled by default like UseRVV even if the hardware RVC extension is there. I hope you could understand that. In the future, we will consider auto-enable UseRVC and UseRVV after enough testing and evaluation.
>
> > I will implement this approach ASAP. Maybe next week I might open another PR including this implementation and the definition of compressed instructions presented in the `assembler_riscv_cext.hpp` part for a better review. I wonder if this is okay for you.
> > I am going to close this PR, save it for future reference, and may open another PR and start from scratch. Before that, just one more question: would you mind my keeping definitions of C-Ext instructions into one separate file like `assembler_riscv_cext.hpp`, as the current implementation? I think we might better keep different RISCV extensions into different files.
>
> Yes, I think `assembler_riscv_c.hpp` will do here.

Totally agree --
Thanks again for your reviews.
Gonna close this PR and the related issue.

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PR: https://git.openjdk.java.net/riscv-port/pull/24