[riscv-port] RFR: 8278337: riscv: remove unnecessary ld/sd zr around calls

[kuaiwei]

On Tue, 7 Dec 2021 12:43:08 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

>> It seems zr(x0) is used as stack alignment when saving/restoring registers around calls. But it's unnecessary to ld/st x0 from/to stack. We just need reserve a stack slot in case alignment is required.
>
> src/hotspot/cpu/riscv/riscv.ad line 1188:
>
>> 1186:     return 12 * NativeInstruction::instruction_size;
>> 1187:   }
>> 1188: }
>
> `// for real runtime callouts it will be six instructions` should be five instructions now

The 2 la macro instructions will be expand to 8 instructions. In XiaoLin's recent patch, he added detail in comments.

//   la(t1, retaddr)                ->  auipc + addi
//   la(t0, RuntimeAddress(addr))   ->  lui + addi + slli(C) + addi + slli(C) + addi
//   addi(sp, sp, -2 * wordSize)    ->  addi(C)
//   sd(zr, Address(sp))            ->  sd(C)
//   sd(t1, Address(sp, wordSize))  ->  sd(C)
//   jalr(t0)                       ->  jalr(C)

Check https://github.com/openjdk/riscv-port/pull/24/files#diff-e3c18b8b83898e82b5a3069319df6a47468e91cc2527bf065e704a685a20f26b

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PR: https://git.openjdk.java.net/riscv-port/pull/25