[riscv-port] RFR: 8278833: riscv: Remove the x3 and x4 register saving logic in register savers [v3]

[Xiaolin Zheng]

> Hi team,
> 
> x3 is the global pointer register used to reference global variables in C++ code, generated by linker; and x4 is the thread pointer register and would be modified by the kernel. In the riscv-port repo, we have no other modifications for the x3 & x4 registers so I would recommend removing the x3 & x4 saving logic in register savers. Previously verified along with other patches under full tiers jdk/hotspot on boards, and verified a simple `test/jtreg/hotspot/compiler` after fixing conflicts with [JDK-8278337](https://github.com/openjdk/riscv-port/pull/25).
> 
> BTW since we remove both two registers together, sp remains 16-byte aligned without other changes in stack frames.
> 
> Thanks,
> Xiaolin

Xiaolin Zheng has updated the pull request incrementally with one additional commit since the last revision:

  Further fix comments for JDK-8278337

-------------

Changes:
  - all: https://git.openjdk.java.net/riscv-port/pull/31/files
  - new: https://git.openjdk.java.net/riscv-port/pull/31/files/bdb5fba3..39d4e755

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=31&range=02
 - incr: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=31&range=01-02

  Stats: 4 lines in 1 file changed: 0 ins; 0 del; 4 mod
  Patch: https://git.openjdk.java.net/riscv-port/pull/31.diff
  Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/31/head:pull/31

PR: https://git.openjdk.java.net/riscv-port/pull/31