[riscv-port] RFR: 8278895: riscv: Rename Riscv64 to RISCV64 [v2]

[Yanhong Zhu]

> Rename Riscv64 to RISCV64 for consistence.
> 
> The related tests passed on QEMU:
> 
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHA1IntrinsicsOptionOnUnsupportedCPU.java
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHA256IntrinsicsOptionOnUnsupportedCPU.java
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHA512IntrinsicsOptionOnUnsupportedCPU.java
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/TestUseSHAOptionOnUnsupportedCPU.java
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java
> - test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForUnsupportedRISCV64CPU.java
> - test/hotspot/jtreg/runtime/NMT/CheckForProperDetailStackTrace.java
> - test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java
> - test/jdk/jdk/jfr/event/os/TestCPUInformation.java
> - test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java

Yanhong Zhu has updated the pull request incrementally with one additional commit since the last revision:

  modify RV64 to RISCV64

-------------

Changes:
  - all: https://git.openjdk.java.net/riscv-port/pull/33/files
  - new: https://git.openjdk.java.net/riscv-port/pull/33/files/1958f7f6..06a56d51

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=33&range=01
 - incr: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=33&range=00-01

  Stats: 1 line in 1 file changed: 0 ins; 0 del; 1 mod
  Patch: https://git.openjdk.java.net/riscv-port/pull/33.diff
  Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/33/head:pull/33

PR: https://git.openjdk.java.net/riscv-port/pull/33