[riscv-port] RFR: 8278890: riscv: Missing features string in VM_Version
Fei Yang
fyang at openjdk.java.net
Tue Dec 21 01:37:42 UTC 2021
On Mon, 20 Dec 2021 09:30:58 GMT, Yadong Wang <yadongwang at openjdk.org> wrote:
> The features_string of VM_Version is supposed to be "sifive,u74-mc,rv64imafdc" for the unmatched board, which is made up of "uarch" and "isa" in /proc/cpuinfo.
> In contrast, it's "family 6 model 79 stepping 1 microcode 0xb000036, cx8, cmov, fxsr, ht, mmx, 3dnowpref, sse, sse2, sse3, ssse3, sse4.1, sse4.2, popcnt, lzcnt, tsc, tscinvbit, avx, avx2, aes, erms, clmul, bmi1, bmi2, rtm, adx, fma, vzeroupper, clflush" in a x86 platform, and "0x41:0x0:0xd08:2, fp, simd, evtstrm, aes, pmull, sha1, sha256, crc" in aarch64.
> After this PR, the following output is displayed when you run this test case `test/jdk/jdk/jfr/event/os/TestCPUInformation.java` on some common riscv platforms:
> 1. unmatched:
>
> Event: jdk.CPUInformation {
> startTime = 15:54:00.844 (2021-12-20)
> cpu = "RISCV64"
> description = "RISCV64 sifive,u74-mc,rv64imafdc"
> sockets = 4
> cores = 4
> hwThreads = 4
> }
>
> 2. D1:
>
> Event: jdk.CPUInformation {
> startTime = 17:04:39.520 (2021-12-20)
> cpu = "RISCV64"
> description = "RISCV64 rv64imafdcv"
> sockets = 1
> cores = 1
> hwThreads = 1
> }
Looks good.
-------------
Marked as reviewed by fyang (Lead).
PR: https://git.openjdk.java.net/riscv-port/pull/35
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