[riscv-port] Integrated: 8278644: riscv: Intrinsify mulAdd

[Feilong Jiang]

On Tue, 21 Dec 2021 01:15:43 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> BigInteger intrinsic: mulAdd intrinsic is missed in current vm. It should be implemented.
> The JMH test of mulAdd intrinsic on the matched board shows that the performance can be improved by 0.69%~21.91% when the length of BigInteger changed from 1 to 5000, compared with that of C2.
> JMH test: [MyBenchmark.java](https://bugs.openjdk.java.net/secure/attachment/97414/MyBenchmark.java)
> 
> Performed full jtreg test with qemu without new failures.
> 
> Results list as follows
> | length | intrinsic(ops/ms) | no intrinsic(ops/ms) | intrinsic / no intrinsic |
> | ------ | ------ | ------ | ------ | 
> | 1 | 1643.111 | 1623.814 | 1.18% |
> | 2 | 1597.927 | 1585.216 | 0.80% |
> | 3 | 1542.249 | 1502.455 | 2.65% |
> | 5 | 1533.371 | 1522.837 | 0.69% |
> | 10 | 1377.683 | 1361.718 | 1.17% |
> | 50 | 925.826 | 844.276 | 9.62% |
> | 100 | 638.767 | 576.276 | 10.84% |
> | 1000 | 99.870 | 84.796 | 17.78% |
> | 2000 | 51.511 | 43.624 | 18.08% |
> | 5000 | 18.017 | 14.779 | 21.91% |

This pull request has now been integrated.

Changeset: 6247be12
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.java.net/riscv-port/commit/6247be12fea3b1e8ca5498f13c1ad3b0488eb34f
Stats:     106 lines in 4 files changed: 106 ins; 0 del; 0 mod

8278644: riscv: Intrinsify mulAdd

Co-authored-by: Taiping Guo <guotaiping1 at huawei.com>
Reviewed-by: fyang

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PR: https://git.openjdk.java.net/riscv-port/pull/36