[riscv-port] RFR: 8279344: riscv: RVB: Add bitwise rotation instructions [v3]

[Feilong Jiang]

> This PR implements bitwise instructions of RISC-V BitManipulation Extension, including ror/rolw/ror/rori/roriw/rorw.
> 
> This PR also add zext/bext C2 instructions that were missed in JDK-8279213

Feilong Jiang has updated the pull request incrementally with one additional commit since the last revision:

  remove unused instruction in riscv_b.ad

-------------

Changes:
  - all: https://git.openjdk.java.net/riscv-port/pull/39/files
  - new: https://git.openjdk.java.net/riscv-port/pull/39/files/565fd2e2..d9f91328

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=39&range=02
 - incr: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=39&range=01-02

  Stats: 118 lines in 1 file changed: 0 ins; 118 del; 0 mod
  Patch: https://git.openjdk.java.net/riscv-port/pull/39.diff
  Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/39/head:pull/39

PR: https://git.openjdk.java.net/riscv-port/pull/39